PM150CSA060_ 데이터 시트보기 (PDF) - MITSUBISHI ELECTRIC
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PM150CSA060_ Datasheet PDF : 31 Pages
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MITSUBISHI SEMICONDUCTORS POWER MODULES MOS
USING INTELLIGENT POWER MODULES
2. Half-Bridge Test Circuit and
Switching Time Definitions.
Figure 6.10 Half-Bridge Test Circuit and Switching Time Definitions
Figure 6.10 shows the stan-
dard half-bridge test circuit and
switching waveforms. Switch-
ing times and FWDi recovery
characteristics are defined as
shown in this figure.
3. Overcurrent and
Short-Circuit Test
Itrip levels and timing specifica-
tions in short circuit and
overcurrent are defined as
shown in Figure 6.11. By using
a fixed load resistance the sup-
ply voltage, VCC, is gradually
increased until OC and SC trip
levels are reached.
Precautions:
A. Before applying any main bus
voltage, VCC, the input termi-
nals should be pulled up by re-
sistors to their corresponding
control supply (or SXR) pin,
each input signal should be
kept in OFF state, and the con-
trol supply should be provided.
After this, the specified ON and
OFF level for each input signal
should be applied. The control
supply should also be applied
to the non-operating arm of the
module under test and inputs
of these arms should be kept
to their OFF state.
B. When performing OC and SC
tests the applied voltage, VCC,
must be less than VCC(prot)
and the turn-off surge voltage
spike must not be allowed to
rise above the VCES rating of
the device. (These tests must
not be attempted using a
curve tracer.)
+
VD
OFF
SIGNAL
+
VD
ON
PULSE
INTEGRATED
GATE
CONTROL
CIRCUIT
INTEGRATED
GATE
CONTROL
CIRCUIT
VCE
IC
+
VCC
trr
Irr
IC
90%
VCE
90%
10%
tc (on)
ICIN
td (on)
tr
(t on = td (on) + tr)
tc (off)
10%
IC
td (off)
tf
(t off = td (off) + tf)
Figure 6.11 Over-Current and Short-Circuit Test Circuit
+
ON
VC
PULSE
ON
PULSE
SC
OC
IC
R*
INTEGRATED
GATE
CONTROL
CIRCUIT
VCC
IC
* R IS SIZED TO CAUSE
SC AND OC CONDITIONS
INPUT
SIGNAL
NORMAL
OPERATION
SC
OC
IC
toff (OC)
SC
OC
IC
OVER
CURRENT
SHORT
CIRCUIT
Sep.1998
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