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SL74HCT138

1- of-8 Decoder/Demultiplexer

System Logic Semiconductor 

SL74HCT138

1- of-8 Decoder/Demultiplexer

High-Performance Silicon-Gate CMOS

The SL74HCT138 is identical in pinout to the LS/ALS138. The

SL74HCT138 may be used as a level converter for interfacing TTL or

NMOS outputs to High Speed CMOS inputs.

The SL74HCT138 decodes a three-bit Address to one-of-eight

active-lot outputs. This device features three Chip Select inputs, two

active-low and one active-high to facilitate the demultiplexing,

cascading, and chip-selecting functions. The demultiplexing function is

accomplished by using the Address inputs to select the desired device

output; one of the Chip Selects is used as a data input while the other

Chip Selects are held in their active states.

• TTL/NMOS Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 µA

ORDERING INFORMATION

SL74HCT138N Plastic

SL74HCT138D SOIC

TA = -55° to 125° C for all packages

PIN ASSIGNMENT

LOGIC DIAGRAM

PIN 16 =VCC

PIN 8 = GND

FUNCTION TABLE

Inputs

Outputs

CS1CS2CS3 A2 A1A0

Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7

XXH

XHX

LXX

XXX

XXX

XXX

H H H HHHHH

H H H HHHHH

H H H HHHHH

HLL

HLL

HLL

HLL

LLL

LLH

LHL

LHH

L H H HHHHH

H L H HHHHH

H H L HHHHH

H H H LHHHH

HLL

HLL

HLL

HLL

HLL

HLH

HHL

HHH

H H H HLHHH

H H H HHLHH

H H H HHHLH

H H H HHHHL

H = high level (steady state)

L = low level (steady state)

X = don’t care

SLS

System Logic

Semiconductor

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