Read Timing Diagram
ADDRESSES
CE
OE
UB, LB
DOUT
PRELIMINARY
tRC
tAA
tACE
tAOE
tBA
tLZBE(1)
tLZOE(1)
tLZCE(1)
tOH
tHZCE(1)
tHZOE(1)
tHZBE(1)
Output Data Valid
PDM31564
AC Electrical Characteristics
Description
-8*
-10*
–12
–15
–20
READ Cycle
READ cycle time
Address access time
Chip enable access time
Byte access time
Output hold from address change
Byte disable to output in low-Z(1)
Byte enable to output in high-Z(1)
Chip enable to output in low-Z(1)
Chip disable to output high-Z(1, 2)
Output enable access time
Output enable to output in low-Z(1)
Output disable to output in high-Z(1, 2)
Symbol Min Max Min Max Min Max Min Max Min Max Unit
tRC
8
– 10 – 12 — 15 — 20 — ns
tAA
–
8
– 10 — 12 — 15 — 20 ns
tACE
–
8
– 10 — 12 — 15 — 20 ns
tBA
–
5
–
6 — 7 — 8 — 9 ns
tOH
4
–
4
–
4 — 4 — 4 — ns
tLZBE
0
–
0
–
0 — 0 — 0 — ns
tHZBE
–
4
–
5 — 8 — 9 — 9 ns
tLZCE
3
–
3
–
4 — 4 — 5 — ns
tHZCE
–
4
–
5 — 6 — 7 — 8 ns
tAOE
–
4
–
5 — 6 — 7 — 10 ns
tLZOE
0
–
0
–
0 — 0 — 0 — ns
tHZOE
–
4
–
5 — 5 — 6 — 6 ns
* VCC = 3.3V +5%
6
Rev. 1.2 - 3/31/98