AK7719BECB 데이터 시트보기 (PDF) - Asahi Kasei Microdevices

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AK7719BECB

Low Power DSP for Voice and Audio Processing

Asahi Kasei Microdevices 

[AK7719B]

■ Pin Function

No. Pin Name I/O

Function

A5 VDD

- Core Power Supply Pin 1.2V

A3 TVDD

- I/O power Supply Pin 1.63.6V

A4 VSS

- Ground Pin 0V

A6 PDN

Power-Down Mode Pin

I “H”: Power-up, “L”: Power-down, reset the control register.

The AK7719B must be reset once upon power-up.

E6 SYNC1

I Frame Sync 1 pin

D6 BCLK1

I

Serial Data Clock 1 Pin

AK7719B goes into stanby state when BCLK1 is not present.

B6 SDIN1

I Serial Data Input 1 Pin

C6 SDOUT1

O Serial Data Output 1 Pin

SDOUT4

Serial Data Output 4 Pin

(SELDO4[1:0] bits = “00”)

D3

GP1

STO

DSP Programmable output 1 Pin

O Status Output Pin (Active High)

(SELDO4[1:0] bits = “01”)

(SELDO4[1:0] bits = “10”)

RDY

Data Write Ready output pin for control I/F

(SELDO4[1:0] bits = “11”)

E5 SYNC2

I Frame Sync 2 Pin (Internal Pull-down pin)

O Frame Sync 2 Pin

(PT25N bit = “0”)

(PT25N bit = “1”)

E4 BCLK2

I Serial Data Clock 2 Pin (Internal Pull-down pin)

O Serial Data Clock 2 Pin

(PT25N bit = “0”)

(PT25N bit = “1”)

E3 SDIN2

I Serial Data Input 2 Pin

E2 SDOUT2

O Serial Data Output 2 Pin

(“L” output at PORTSEL25 bit= “1”)

B4

SYNC3

JX1

I

Frame Sync 3 pin

Conditional Jump 1 Pin

(SELSRC bit = “1”)

(SELSRC bit = “0”)

B5

BCLK3

JX0

C5 SDIN3

I

Serial Data Clock 3 Pin

Conditional Jump 0 Pin

I Serial Data Input 3 Pin

(SELSRC bit = “1”)

(SELSRC bit = “0”)

D5

SDOUT3

GP0

O

Serial Data Output 3 Pin

DSP Programmable output 0 Pin

(SELDO3 bit = “0”)

(SELDO3 bit = “1”)

B1 SYNC4

I Frame Sync 4 Pin

A1 BCLK4

I Serial Data Clock 4 Pin

C3 SDIN4

I Serial Data Input 4 Pin

E1 SYNC5

I Frame Sync 5 Pin (Internal Pull-down pin)

O Frame Sync 5 Pin

(PT25N bit = “0”)

(PT25N bit = “1”)

D1 BCLK5

I Serial Data Clock 5 Pin (Internal Pull-down pin)

O Serial Data Clock 5 Pin

(PT25N bit = “0”)

(PT25N bit = “1”)

C1 SDIN5

I Serial Data Input 5 Pin

E4 SDOUT5

B3 I2C

O Serial Data Output 5 Pin

( “L” output at PORTSEL25 bit= “0”)

I Control Interface Mode Select Pin “H”: I2C, “L”: SPI

B2 SCLK

CAD0

C2 CSN

SCL

Serial Clock Input pin

I

Slave Address 0 Input pin

Chip select pin

I

Control Interface clock input pin

SPI (I2C pin = “L”)

I2C (I2C pin = “H”)

SPI (I2C pin = “L”)

I2C (I2C pin = “H”)

SO

D2

SDA

O Serial data output pin

I/O Control Interface input/output acknowledge pin

SPI (I2C pin = “L”)

I2C (I2C pin = “H”)

A2

SI

CAD1

I

Serial data input pin

Slave Address 1 Input pin

SPI (I2C pin = “L”)

I2C(I2C pin = “H”)

C4 TEST

I Test pin (pull-down resistor) must be connected to VSS.

Note 1. All input pins must not be allowed to float.

Note 2. I2C and CAD0/1 pins must be fixed to “L” (VSS) or “H” (TVDD).

MS1565-E-00-PB

6

2013/11

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