AK4571 데이터 시트보기 (PDF) - Asahi Kasei Microdevices
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AK4571 Datasheet PDF : 54 Pages
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ASAHI KASEI
[AK4571]
ディジタルDC特性
Ta=0 - 70°C; VD=3.0 - 3.6V; DGND=0V Measurement under static state
All digital pins except DP, DN. Schmitt hysteresis level of RSTN pin and levels of all test pins will not be tested.
Parameter
Symbol
Min
Typ
Max
EPDI,EPEN, EPSEL, pin “H” level input voltage
VIH
70%VD
EPDI, EPEN, EPSEL pin “L” level input voltage
RSTN pin “H” level voltage
RSTN pin “L” level voltage
IMUTE, OMUTE, INC, DEC pin “H” level voltage
VIL
VIHR
2.4
VILR
VIHR
2.4
30%VD
0.8
IMUTE, OMUTE, INC, DEC pin “L” level voltage
VILR
0.8
SUSN, EPSW, STBY, EMSW, MSTAT pin
VOH
2.4
“H” level output voltage IOH= 2mA
SUSN, EPSW, STBY, EMSW, MSTAT pin
VOL
0.6
“L” level output voltage IOL= -2mA
CS, SK, EPAO pin “H” level output voltage
VOH
2.4
IOH= 2mA
CS, SK, EPAO pin “L” level output voltage
VOL
0.6
IOL= -2mA
DP, DN Single Ended Receiver Threshold for “H” level
VIHR
2.0
DP, DN Single Ended Receiver Threshold for pin “L” level
VILR
0.8
Input Leakage Current
Iin
Pull down Resistance (only EPDI pin)@3.3V Ta=25°C
Rpd
±10
100
Units
V
V
V
V
V
V
V
V
V
V
V
V
µA
kΩ
スイッチング特性
Ta=25°C, VA=VD=3.3V
Parameter
Master Clock Frequency
Reset input width @RSTN pin(low active)
Time Width for USB Reset Signal Recognition
DP<VseL & DN< VseL to USB Reset mode
Device Ready Time from USB Reset
After releasing from USB Reset to Device Ready
(Transaction can start)
Time Width for Suspend Recognition
Idle state ( DP > VseL & DN < VseL )
to Suspend mode
Resume Time from Suspend
First flip of D P/DN from Idle state
To Device Ready *)
Imute input width with @IMUTE pin(High active)
Omute,Dec,Inc input width with @OMUTE,DEC,INC
pin (High active)
Symbol
MCLK
Wrst
Trst_rec
Tdrr
Tsus_rec
Tresm
Wimute
Wodi
Min
-
1.0
3.0
4.36
10.005
2.001
Typ
12.000
Max
Units
-
MHz
us
µs
10
ms
ms
30
ms
ms
ms
Device Ready: VREF, X’tal oscillator and PLL are stable and standard bus transactions can proceed
MS0153-J-02
-9 -
2003/3
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