AK4351 데이터 시트보기 (PDF) - Asahi Kasei Microdevices

부품명

상세내역

일치하는 목록

AK4351

18Bit Advanced Multi Bit ΔΣ 2ch DAC

Asahi Kasei Microdevices 

ASAHI KASEI

[AK4351]

n Power-down

The AK4351 is placed in the power-down mode by bringing PD pin “L” and the anlog outputs are floating(Hi-Z).

Figure 4 shows an example of the system timing at the power-down and power-up.

PD

Internal

State

D/A In

(Digital)

D/A Out

(Analog)

Clock In

MCLK,LRCK,BICK

Normal Operation

Power-down

Normal Operation

“0”data

GD (1)

(3) (2)

(3)

GD (1)

(4)

External

Mute

(5)

Mute On

Notes:

Figure 4. Power-down/up sequence example

(1) Analog output corresponding to digital input has the group delay (GD).

(2) Analog outputs are floating (Hi-Z) at the power-down mode.

(3) Click noise occures at the edges(“­ ¯”) of the falling edge of PD signal.

(4) When the external clocks(MCLK,BICK,LRCK) are stopped, the AK4351 should be in the power-down

mode.

(5) Please mute the analog output externally if the click noise(3) influences system application.

The timing example is shown in this figure.

n System Reset

The AK4351 should be reset once by bringing PD = ”L” upon power-up. The AK4351 is powered up and the internal

timing starts clocking by LRCK “­” after exiting reset and power down state by MCLK. The AK4351 is in power-down

mode until MCLK and LRCK are input.

M0022-E-04

- 10 -

1999/12

Share Link: