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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AKD4341 데이터 시트보기 (PDF) - Asahi Kasei Microdevices

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AKD4341
AKM
Asahi Kasei Microdevices AKM
AKD4341 Datasheet PDF : 18 Pages
First Prev 11 12 13 14 15 16 17 18
ASAHI KASEI
Output Gain Setting
Outputs level of AOUTL/AOUTR pin can be selected by GAIN pin.
GAIN pin GAIN Input Level
Output Level (VDD=3.3V)
L
0dB
0dBFS
2Vrms (typ)
H
+6.0dB
-6dBFS
2Vrms (typ)
open
+12dB
-12dBFS
2Vrms (typ)
Note 15. Output level of AOUTL/AOUTR pin clips if it exceeds 2Vrms.
The input data should be 2Vrms or less as the output level.
Table 4. Output Level Setting
[AK4341]
(Note 15)
(Note 15)
Soft Mute Operation
Soft mute operation is performed at digital domain. When the SMUTE pin goes to “H”, the output signal is attenuated by
-during 1024 LRCK cycles. When the SMUTE pin is returned to “L”, the mute is cancelled and the output attenuation
gradually changes to 0dB during 1024 LRCK cycles. If the soft mute is cancelled within the 1024 LRCK cycles after
starting the operation, the attenuation is discontinued and returned to 0dB by the same cycle. The soft mute is effective for
changing the signal source without stopping the signal transmission.
SMUTE pin
0dB
Attenuation
1024/fs
(1)
1024/fs
(3)
-
GD
GD
(2)
AOUT
Notes:
(1) 1020LRCK cycles (1020/fs) at input data is attenuated to -.
(2) The analog output corresponding to the digital input has a group delay, GD.
(3) If the soft mute is cancelled before attenuating to -after starting the operation, the attenuation is discontinued and
returned to ATT level by the same cycle.
Figure 3. Soft Mute
System Reset
The AK4341 must be reset once by bringing PDN pin = “L” upon power-up. The AK4341 is powered up and the internal
timing starts clocking by LRCK “” after exiting reset and power down state by MCLK. The AK4341 is in the
power-down mode until LRCK are input.
MS0558-E-01
- 11 -
2007/03

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