ADSP-2195 데이터 시트보기 (PDF) - Analog Devices
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ADSP-2195 Datasheet PDF : 68 Pages
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September 2001 For current information contact Analog Devices at 800/262-5643
ADSP-2195
of the ADSP-219x development tools, including the syntax
highlighting in the VisualDSP++ editor. This capability
permits:
• Control how the development tools process inputs and
generate outputs.
• Maintain a one-to-one correspondence with the tool’s
command line switches.
Analog Devices’ DSP emulators use the IEEE 1149.1 JTAG
test access port of the ADSP-2195 processor to monitor and
control the target board processor during emulation. The
emulator provides full-speed emulation, allowing inspection
and modification of memory, registers, and processor
stacks. Nonintrusive in-circuit emulation is assured by the
use of the processor’s JTAG interface—the emulator does
not affect target system loading or timing.
In addition to the software and hardware development tools
available from Analog Devices, third parties provide a wide
range of tools supporting the ADSP-219x processor family.
Hardware tools include ADSP-219x PC plug-in cards.
Third Party software tools include DSP libraries, real-time
operating systems, and block diagram design tools.
Designing an Emulator-Compatible DSP Board
(Target)
The White Mountain DSP (Product Line of Analog
Devices, Inc.) family of emulators are tools that every DSP
developer needs to test and debug hardware and software
systems. Analog Devices has supplied an IEEE 1149.1
JTAG Test Access Port (TAP) on each JTAG DSP. The
emulator uses the TAP to access the internal features of the
DSP, allowing the developer to load code, set breakpoints,
observe variables, observe memory, and examine registers.
The DSP must be halted to send data and commands, but
once an operation has been completed by the emulator, the
DSP system is set running at full speed with no impact on
system timing.
To use these emulators, the target’s design must include the
interface between an Analog Devices’ JTAG DSP and the
emulation header on a custom DSP target board.
Target Board Header
The emulator interface to an Analog Devices’ JTAG DSP
is a 14-pin header, as shown in Figure 7. The customer must
supply this header on the target board in order to commu-
nicate with the emulator. The interface consists of a
standard dual row 0.025" square post header, set on
0.1" ؋ 0.1" spacing, with a minimum post length of 0.235".
Pin 3 is the key position used to prevent the pod from being
inserted backwards. This pin must be clipped on the target
board.
Also, the clearance (length, width, and height) around the
header must be considered. Leave a clearance of at least
0.15" and 0.10" around the length and width of the header,
and reserve a height clearance to attach and detach the pod
connector.
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Figure 7. JTAG Target Board Connector for JTAG
Equipped Analog Devices DSP (Jumpers in
Place)
As can be seen in Figure 7, there are two sets of signals on
the header. There are the standard JTAG signals TMS,
TCK, TDI, TDO, TRST, and EMU used for emulation
purposes (via an emulator). There are also secondary JTAG
signals BTMS, BTCK, BTDI, and BTRST that are option-
ally used for board-level (boundary scan) testing.
When the emulator is not connected to this header, place
jumpers across BTMS, BTCK, BTRST, and BTDI as
shown in Figure 8. This holds the JTAG signals in the
correct state to allow the DSP to run free. Remove all the
jumpers when connecting the emulator to the JTAG header.
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Figure 8. JTAG Target Board Connector with No Local
Boundary Scan
REV. PrA
This information applies to a product under development. Its characteristics and specifications are subject to change with-
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out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
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