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ADG508FBNZ

8-Channel/4-Channel Fault-Protected Analog Multiplexers

Analog Devices 

THEORY OF OPERATION

The ADG508F/ADG509F multiplexers are capable of withstand-

ing overvoltages from −40 V to +55 V, irrespective of whether the

power supplies are present or not. Each channel of the multiplexer

consists of an n-channel MOSFET, a p-channel MOSFET, and an

n-channel MOSFET, connected in series. When the analog input

exceeds the power supplies, one of the MOSFETs will saturate

limiting the current. The current during a fault condition is

determined by the load on the output. Figure 17 illustrates

the channel architecture that enables these multiplexers to

withstand continuous overvoltages.

When an analog input of VSS + 2.2 V to VDD − 2.2 V (output

loaded, 1 mA) is applied to the ADG508F/ADG509F, the

multiplexer behaves as a standard multiplexer, with spec-

ifications similar to a standard multiplexer, for example,

the on-resistance is 390 Ω maximum. However, when an

overvoltage is applied to the device, one of the three

MOSFETs saturate.

Figure 17 to Figure 20 show the conditions of the three MOSFETs

for the various overvoltage situations. When the analog input

applied to an on channel approaches the positive power supply

line, the n-channel MOSFET saturates because the voltage on

the analog input exceeds the difference between VDD and the

n-channel threshold voltage (VTN). When a voltage more nega-

tive than VSS is applied to the multiplexer, the p-channel

MOSFET will saturate because the analog input is more

negative than the difference between VSS and the p-channel

threshold voltage (VTP). Because VTN is nominally 1.4 V and

VTP −1.4 V, the analog input range to the multiplexer is limited

to VSS + 1.4 V to VDD – 1.4 V (output open circuit) when a

±15 V power supply is used.

When the power supplies are present but the channel is off,

again either the p-channel MOSFET or one of the n-channel

MOSFETs will remain off when an overvoltage occurs.

Finally, when the power supplies are off, the gate of each

MOSFET will be at ground. A negative overvoltage switches

on the first n-channel MOSFET but the bias produced by the

overvoltage causes the p-channel MOSFET to remain turned

off. With a positive overvoltage, the first MOSFET in the series

will remain off because the gate to source voltage applied to this

MOSFET is negative.

ADG508F/ADG509F

During fault conditions (power supplies off), the leakage

current into and out of the ADG508F/ADG509F is limited to

a few microamps. This protects the multiplexer and succeeding

circuitry from over stresses as well as protecting the signal

sources which drive the multiplexer. Also, the other channels

of the multiplexer will be undisturbed by the overvoltage and

will continue to operate normally.

+55V

OVERVOLTAGE

Q1

Q2

Q3

n-CHANNEL

MOSFET

SATURATES

VDD

VSS

Figure 17. +55 V Overvoltage Input to the On Channel

–40V

OVERVOLTAGE

Q1

Q2

Q3

n-CHANNEL

MOSFET

IS ON

VSS

p-CHANNEL

MOSFET

VDD SATURATES

Figure 18. −40 V Overvoltage on an Off Channel with

Multiplexer Power On

+55V

OVERVOLTAGE

Q1

Q2

Q3

n-CHANNEL

MOSFET IS

OFF

Figure 19. +55 V Overvoltage with Power Off

–40V

OVERVOLTAGE

Q1

Q2

Q3

n-CHANNEL

MOSFET IS

ON

p-CHANNEL

MOSFET IS

OFF

Figure 20. −40 V Overvoltage with Power Off

Rev. F | Page 11 of 20

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