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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AD7490BCPZ 데이터 시트보기 (PDF) - Analog Devices

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AD7490BCPZ Datasheet PDF : 29 Pages
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Data Sheet
AD7490
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of total harmonic
distortion (THD) that can be tolerated. The THD increases as
the source impedance increases, and performance degrades (see
Figure 9).
ADC TRANSFER FUNCTION
The output coding of the AD7490 is either straight binary or
twos complement depending on the status of the LSB
(CODING bit) in the control register. The designed code
transitions occur midway between successive LSB values (that
is, 1 LSB, 2 LSBs, and so on). The LSB size is equal to
REFIN/4096. The ideal transfer characteristic for the AD7490
when straight binary coding is selected is shown in Figure 18.
111...111
111...110
111...000
011...111
1LSB = VREF/4096
000...010
000...001
000...000
1LSB
0V
+VREF – 1LSB
ANALOG INPUT
VREF IS EITHER REFIN OR 2 × REFIN
Figure 18. Straight Binary Transfer Characteristic
Handling Bipolar Input Signals
Figure 20 shows how useful the combination of the 2 × REFIN
input range and the twos complement output coding scheme is
for handling bipolar input signals. If the bipolar input signal is
biased about REFIN and twos complement output coding is
selected, REFIN becomes the zero code point, −REFIN is negative
full scale, and +REFIN becomes positive full scale, with a
dynamic range of 2 × REFIN.
011...111
011...110
000...001
000...000
111...111
100...010
100...001
100...000
1LSB = 2 × VREF/4096
–VREF + 1LSB
+VREF – 1LSB
VREF – 1LSB
ANALOG INPUT
Figure 19. Twos Complement Transfer Characteristic
with REFIN ± REFIN Input Range
VREF
0.1µF
R4
V
R3
R2
0V
V
R1
R1 = R2 = R3 = R4
VDD
REFIN VDD
VDRIVE
AD7490
TWOS
COMPLEMENT
VIN0
DOUT
DSP/µP
+REFIN
(= 2 × REFIN)
REFIN
–REFIN
(= 0V)
VIN15
Figure 20. Handling Bipolar Signals
011...111
000...000
100...000
Rev. D | Page 17 of 28

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