AD561 데이터 시트보기 (PDF) - Analog Devices
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AD561 Datasheet PDF : 8 Pages
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Model
RESOLUTION
ACCURACY (Error Relative
to Full Scale)
DIFFERENTIAL NONLINEARITY
DATA INPUTS
TTL, VCC = +5 V
Bit ON Logic “1”
Bit OFF Logic “0”
CMOS, 10 V ≤ VCC ≤ 16.5 V
Bit ON Logic “ 1 “
Bit OFF Logic “0”
Logic Current (Each Bit) (TMIN to TMAX)
Bit ON Logic “1”
Bit OFF Logic “0”
OUTPUT
Current
Unipolar
Bipolar
Resistance (Exclusive of
Application Resistors)
Unipolar Zero (All Bits OFF)
Capacitance
Compliance Voltage
SETTLING TIME TO 1/2 LSB
All Bits ON-to-OFF or OFF-to-ON
POWER REQUIREMENTS
VCC, +4.5 V dc to +16.5 V dc
VEE, –10.8 V dc to –16.5 V dc
POWER SUPPLY GAIN SENSITIVITY
VCC, +4.5 V dc to +16.5 V dc
VEE, –10.8 V dc to –16.5 V dc
TEMPERATURE RANGE
Operating
Storage
TEMPERATURE COEFFICIENTS
With Internal Reference
Unipolar Zero
Bipolar Zero
Full Scale
Differential Nonlinearity
MONOTONICITY
PROGRAMMABLE OUTPUT
RANGES
CALIBRATION ACCURACY
Full-Scale Error with Fixed 25 Ω
Resistor
Bipolar Zero Error with Fixed 10 Ω
Resistor
CALIBRATION ADJUSTMENT
RANGE
Full Scale (With 50 Ω Trimmer)
Bipolar Zero (With 50 Ω Trimmer)
NOTES
**Specifications same as AD561S specifications.
Specifications subject to change without notice.
AD561S
Min
Typ
Max
AD561T
Min
Typ
Max
10 Bits
10 Bits
± 1/4
(0.025)
± 1/2
± 1/2
(0.05)
± 1/8
(0.012)
± 1/4
± 1/4
(0.025)
± 1/2
+2.0
**
+0.8
**
70% VCC
**
30% VCC
**
+20
+100
–25
–100
**
**
**
**
1.5
2.0
2.4
**
**
**
± 0.75 ± 1.0
± 1.2
**
**
**
40 M
**
0.01
0.05
**
**
25
**
–2
–3
+10
**
**
**
250
**
6
10
11
16
**
**
**
**
2
10
4
25
**
**
**
**
–55 to +125
–65 to +150
**
**
**
**
1
10
2
20
15
60
2.5
Guaranteed Over Full Operating
Temperature Range
0 to +10
–5 to +5
1
5
2
10
15
30
2.5
Guaranteed Over Full Operating
Temperature Range
**
**
± 0.1
**
± 0.1
**
± 0.5
**
± 0.5
**
REV. A
–3–
AD561
Units
LSB
% of FS
LSB
V
V
V
V
nA
µA
mA
mA
Ω
% of FS
pF
V
ns
mA
mA
ppm of FS/%
ppm of FS/%
°C
°C
ppm of FS/°C
ppm of FS/°C
ppm of FS/°C
ppm of FS/°C
V
V
% of FS
% of FS
% of FS
% of FS
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