AD5293 데이터 시트보기 (PDF) - Analog Devices
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AD5293 Datasheet PDF : 24 Pages
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AD5293
Parameter
DYNAMIC CHARACTERISTICS4, 8
Bandwidth
Total Harmonic Distortion
VW Settling Time
Symbol
BW
THDW
tS
Resistor Noise Density
eN_WB
Conditions
Min
−3 dB
VA = 1 V rms, VB = 0 V, f = 1 kHz,
VA = 30 V, VB = 0 V, ±0.5 LSB error
band, initial code = zero scale
Code = full scale, R-normal mode
Code = full scale, R-perf mode
Code = half scale, R-normal mode
Code = half scale, R-perf mode
RWB = 10 kΩ, TA = 25°C,
0 kHz to 200 kHz
Typ1 Max
520
−93
750
2.5
2.5
5
10
Unit
kHz
dB
ns
μs
μs
μs
nV/√Hz
1 Typicals represent average readings at 25°C; VDD = +15 V, VSS = −15 V, and VLOGIC = 5 V.
2 Resistor position nonlinearity error. R-INL is the deviation from an ideal value measured between RWB at Code 0x00B to Code 0x3FF or between RWA at Code 0x3F3 to
Code 0x000. R-DNL measures the relative step change from ideal between successive tap positions. The specification is guaranteed in resistor performance mode with
a wiper current of 1 mA for VA < 12 V and 1.2 mA for VA ≥ 12 V.
3 The terms resistor performance mode and R-perf mode are used interchangeably.
4 Guaranteed by design; not subject to production test.
5 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
6 The A, B, and W resistor terminals have no limitations on polarity with respect to each other. Dual-supply operation enables ground-referenced bipolar signal
adjustment.
7 PDISS is calculated from (IDD × VDD) + (ISS × VSS) + (ILOGIC × VLOGIC).
8 All dynamic characteristics use VDD = +15 V, VSS = −15 V, and VLOGIC = 5 V.
RESISTOR PERFORMANCE MODE CODE RANGE—20 kΩ VERSIONS
Table 2.
Resistor
Tolerance
per Code
1% R-Tolerance
2% R-Tolerance
3% R-Tolerance
|VDD − VSS| = 30 V to 33 V
RWB
RWA
From 0x15E From 0x000
to 0x3FF
to 0x2A1
From 0x8C
to 0x3FF
From 0x000
to 0x373
From 0x5A From 0x000
to 0x3FF
to 0x3A5
RAB = 20 kΩ
|VDD − VSS| = 26 V to 30 V
|VDD − VSS| = 22 V to 26 V
RWB
RWA
RWB
RWA
From 0x1F4 From 0x000 From 0x1F4 From 0x000
to 0x3FF
to 0x20B
to 0x3FF
to 0x20B
From 0xB4
to 0x3FF
From 0x000 From 0xFA
to 0x34B
to 0x3FF
From 0x000
to 0x305
From 0x64
to 0x3FF
From 0x000 From 0x78
to 0x39B
to 0x3FF
From 0x000
to 0x387
|VDD − VSS| = 21 V to 22 V
RWB
RWA
N/A
N/A
From 0xFA
to 0x3FF
From 0x78
to 0x3FF
From 0x000
to 0x305
From 0x000
to 0x387
Rev. D | Page 4 of 24
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