AD1984AJCPZ 데이터 시트보기 (PDF) - Analog Devices
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AD1984AJCPZ Datasheet PDF : 20 Pages
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AD1984A
Parameter
MICROPHONE BIAS
MIC_BIAS-B, MIC_BIAS-C
MIC_BIAS_IN (Pin 33) = 5 V or 3.3 V
MIC_BIAS_IN (Pin 33) = 5 V
MIC_BIAS_IN (Pin 33) = 3.3 V
VREF Setting = High-Z
VREF Setting = 0 V
VREF Setting = 50%
VREF Setting = 80%
VREF Setting = 100%
VREF Setting = 80%
VREF Setting = 100%
MIC_BIAS-E (When Enabled as BIAS)
VREF Setting = High-Z
VREF Setting = 0 V
VREF Setting = 50%
VREF Setting = 80%
VREF Setting = 100%
Output Drive Current
GPIO 0
Input Signal High (VIH)
Input Signal Low (VIL)
Output Signal High (VOH)
Output Signal Low (VOL)
Input Leakage Current (Signal High) (IIH)
Input Leakage Current (Signal Low) (IIL)
GPIO 1 and GPIO 2
Input Signal High (VIH)
Input Signal Low (VIL)
Output Signal High (VOH)
Output Signal Low (VOL)
Input Leakage Current (Signal High) (IIH)
Input Leakage Current (Signal Low) (IIL)
DM Clock
Output Signal High (VOH)
Output Signal Low (VOL)
DM_1/2 and DM_2
Input Signal High (VIH)
Input Signal Low (VIL)
Input Leakage Current (Signal High) (IIH)
Input Leakage Current (Signal Low) (IIL)
S/PDIF
Input Signal High (VIH)
Input Signal Low (VIL)
Output Signal High (VOH)
Output Signal Low (VOL)
Input Leakage Current (Signal High) (IIH)
Input Leakage Current (Signal Low) (IIL)
VREF Setting = 50%, 80%, or 100%
IOUT = –500 μA
IOUT = +1500 μA
IOUT = –500 μA
IOUT = +1500 μA
IOUT = –500 μA
IOUT = +1500 μA
IOUT = –500 μA
IOUT = +1500 μA
Min
Typ
Max
Unit
High-Z
0
1.65
3.7
3.9
2.86
3.0
High-Z
0
1.65
2.86
3.0
1.6
DVIO × 0.60
0
DVIO × 0.72
0
150
–50
AVDD × 0.60
0
AVDD × 0.72
0
150
–50
AVDD × 0.72
0
AVDD × 0.60
0
–150
–50
DVIO × 0.60
0
DVIO × 0.72
0
150
–50
V dc
V dc
V dc
V dc
V dc
V dc
V dc
V dc
V dc
V dc
mA
DVIO
V
DVIO × 0.24 V
DVIO
V
DVIO × 0.10 V
nA
μA
AVDD
V
AVDD × 0.24 V
AVDD
V
AVDD × 0.10 V
nA
μA
AVDD
V
AVDD × 0.10 V
AVDD
V
AVDD × 0.24 V
nA
nA
DVIO
V
DVIO × 0.24 V
DVIO
V
DVIO × 0.10 V
nA
μA
Rev. 0 | Page 6 of 20 | April 2008
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