AD1870 데이터 시트보기 (PDF) - Analog Devices
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AD1870 Datasheet PDF : 20 Pages
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AD1870
DIGITAL I/O
Input Voltage HI (VIH)
Input Voltage LO (VIL)
Input Leakage (IIH @ VIH = 5 V)
Input Leakage (IIL @ VIL = 0 V)
Output Voltage HI (VOH @ IOH = –2 mA)
Output Voltage LO (VOL @ IOL = 2 mA)
Input Capacitance
Min
Typ
Max
Unit
2.4
V
0.8
V
10
µA
10
µA
2.4
V
0.4
V
15
pF
DIGITAL TIMING (Guaranteed over –40°C to +85°C, DVDD = AVDD = 5 V ± 5%. Refer to Figures 17–19.)
Min
Typ
tCLKIN
fCLKIN
tCPWL
tCPWH
tRPWL
tBPWL
tBPWH
tDLYCKB
tDLYBLR
tDLYBWR
tDLYBWF
tDLYDT
tSETLRBS
tDLYLRDT
tSETWBS
tDLYBDT
CLKIN Period
48
CLKIN Frequency (1/tCLKIN)
1.28
CLKIN LO Pulsewidth
15
CLKIN HI Pulsewidth
15
RESET LO Pulsewidth
50
BCLK LO Pulsewidth
15
BCLK HI Pulsewidth
15
CLKIN Rise to BCLK Xmit (Master Mode)
BCLK Xmit to LRCK Transition (Master Mode)
BCLK Xmit to WCLK Rise
BCLK Xmit to WCLK Fall
BCLK Xmit to DATA/TAG Valid (Master Mode)
LRCK Setup to BCLK Sample (Slave Mode)
10
LRCK Transition to DATA/TAG Valid (Slave Mode)
No MSB Delay Mode (for MSB Only)
WCLK Setup to BCLK Sample (Slave Mode)
Data Position Controlled by WCLK Input Mode
10
BCLK Xmit to DATA/TAG Valid (Slave Mode)
All Bits Except MSB in No MSB Delay Mode
All Bits in MSB Delay Mode
81
12.288
Max
780
20.48
15
15
10
10
10
40
40
Unit
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
POWER
Supplies
Voltage, Analog and Digital
Analog Current
Analog Current–Power-Down (CLKIN Running)
Digital Current
Digital Current–Power-Down (CLKIN Running)
Dissipation
Operation–Both Supplies
Operation–Analog Supply
Operation–Digital Supply
Power-Down–Both Supplies (CLKIN Running)
Power-Down–Both Supplies (CLKIN Not Running)
Power Supply Rejection (See TPC 5)
1 kHz 300 mV p-p Signal at Analog Supply Pins
20 kHz 300 mV p-p Signal at Analog Supply Pins
Stop Band (>0.55 × fS)—any 300 mV p-p Signal
Min
Typ
4.75
5
43
25
9.3
50
263
216
47
375
375
90
68
110
Max
5.25
52
12
315
260
55
Unit
V
mA
µA
mA
µA
mW
mW
mW
µW
µW
dB
dB
dB
REV. A
–3–
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