A61L6316 데이터 시트보기 (PDF) - AMIC Technology

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A61L6316

64K X 16 BIT HIGH SPEED CMOS SRAM

AMIC Technology 

AC Test Conditions

Input Pulse Levels

Input Rise And Fall Time

Input and Output Timing Reference Levels

Output Load

0V to 3.0V

3 ns

1.5 V

See Figures 1 and 2

A61L6316 Series

OUTPUT

ZO=50Ω

RL=50Ω

VT=1.5V

+3.3V

317Ω

I/O

351Ω

5pF*

* Including scope and jig.

Figure 1. Output Load

Figure 2. Output Load for tCLZ, tOLZ,

tCHZ, tOHZ, tWHZ, and tOW

Data Retention Characteristics (TA = 0°C to 70°C or -25°C to +85°C)

Symbol

Parameter

Min.

Max.

Unit

Conditions

VDR

VCC for Data Retention

2

3.6

V

CE ≥ VCC - 0.2V

ICCDR Data Retention Current

VCC = 2.0V

-

5

mA

CE ≥ VCC - 0.2V

VIN ≥ VCC - 0.2V or

VIN ≤ 0.2V

Chip Disable to Data Retention

tCDR

Time

0

-

tR

Operation Recovery Time

TRC*

-

ns

See Retention Waveform

ms

tRC = Read Cycle Time

(July, 2002, Version 1.1)

11

AMIC Technology, Inc.

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