A6278 데이터 시트보기 (PDF) - Allegro MicroSystems

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A6278

Serial-Input Constant-Current Latched LED Drivers with Open LED Detection

Allegro MicroSystems 

A6278 and

A6279

Serial-Input, Constant-Current Latched

LED Drivers with Open LED Detection

Normal Mode Timing Requirements

CLOCK

SERIAL

DATA IN

SERIAL

DATA OUT

0

1

thigh tlow

SDI n SDI n-1

tSU(D) tH(D)

Don't Care

A6278, n = 7

A6279, n = 15

LATCH

ENABLE

OUTPUT

ENABLE

OUT0

Don't Care

OUT1

Logic Levels: VDD and GND

OUTn

Don't Care

Don't Care

n

SDI 0

SDO n

tp(DO)

tSU(LE) tH(LE)

tSU(OE)

tW(OE)

tP(OE)

tD

tW(OE)

tP(OE)

tD

tD(Total)

tD(Total)

LED Open Circuit Detection (Test) Mode Timing Requirements

(A) To enter LED OCD mode, a minimum of one CLOCK pulse is required after LATCH ENABLE is brought back low.

CLOCK

thigh tlow

1

OUTPUT

ENABLE

LATCH

ENABLE

tSU(OE1)

tH(OE1)

tSU(LE1)

tH(LE1)

(B) To output the latched error code, OUTPUT ENABLE must be held low a minimum of 3 CLOCK cycles.

CLOCK

1

2

3

OUTPUT

ENABLE

SERIAL

DATA OUT

tW(OE1)

Don't Care

SDO n

A6278, n = 7

A6279, n = 15

SDO n-1 SDO n-2

SDO 0

(C) When returning to Normal mode, a minimum of three CLOCK pulses is required after OUTPUT ENABLE is brought back high.

CLOCK

thigh tlow

1

2

3

OUTPUT

ENABLE

Logic Levels: VDD and GND

LATCH

ENABLE

tSU(OE1)

tH(OE1)

Allegro MicroSystems, Inc.

6

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

www.allegromicro.com

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