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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

A6276 데이터 시트보기 (PDF) - Allegro MicroSystems

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A6276 Datasheet PDF : 13 Pages
First Prev 11 12 13
A6276
16-Bit Serial Input, Constant-Current
Latched LED Driver
24
A
Package A, 24-pin DIP
30.10
+0.25
–0.64
6.35
+0.76
–0.25
10.92
+0.38
–0.25
0.38
+0.10
–0.05
7.62
12
1.27 MIN
1.52
+0.25
–0.38
2.54
0.018
0.46 ±0.12
5.33 MAX
For Reference Only
(reference JEDEC MS-001 BE)
3.30
+0.51
–0.38
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
7.80 ±0.10
24
A
12
24X
0.10 C
0.25
+0.05
–0.06
B
4.32
0.65
Package A, 24-pin TSSOP
with exposed thermal pad
3.00 4.40 ±0.10 6.40 ±0.20
4° ±4
0.15
+0.05
–0.06
0.60 ±0.15
(1.00)
0.65
0.45
3.00
6.10
C
SEATING
PLANE
0.25
SEATING PLANE
GAUGE PLANE
1.65
4.32
C PCB Layout Reference View
1.20 MAX
0.15 MAX
For Reference Only
(reference JEDEC MO-153 ADT)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (bottom surface)
C Reference land pattern layout (reference IPC7351
TSOP65P640X120-25M); all pads a minimum of 0.20 mm from all
adjacent pads; adjust as necessary to meet application process
requirements and PCB layout tolerances; when mounting on a multilayer
PCB, thermal vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
Allegro MicroSystems, Inc.
12
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com

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