A4975 데이터 시트보기 (PDF) - Allegro MicroSystems
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A4975 Datasheet PDF : 13 Pages
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A4975
Full-Bridge PWM Microstepping Motor Driver
Note the A4975SB (DIP) and the A4975SLB
(SOIC) are electrically identical and share a
common terminal number assignment.
PFD 1
VBB
REF 2
RC 3
GROUND 4
GROUND 5
LOGIC
SUPPLY
6 VCC
PHASE 7
LOGIC
D2 8
16
LOAD
SUPPLY
15 OUTB
14 D 0
13 GROUND
12 GROUND
11 SENSE
10 OUTA
9 D1
Terminal Functions
Terminal
1
2
3
4-5
6
7
8
9
10
11
12-13
14
15
16
Name
Description
PFD
(Percent Fast Decay) The analog input used to set the current-decay mode.
REF
RC
GROUND
(VREF) The voltage at this input (along with the value of RS and the states of DAC inputs
D0, D1, and D2) set the peak output current.
The parallel combination of external resistor RT and capacitor CT set the off time for the
PWM current regulator. CT also sets the blanking time.
Return for the logic supply (VCC) and load supply (VBB); the reference for all voltage
measurements.
LOGIC SUPPLY (VCC) Supply voltage for the logic circuitry. Typically = 5 V.
PHASE
The PHASE input determines the direction of current in the load.
D2
D1
OUTA
SENSE
(DATA2) One-of-three (MSB) control bits for the internal digital-to-analog converter.
(DATA1) One-of-three control bits for the internal digital-to-analog converter.
One-of-two output load connections.
Connection to the sink-transistor emitters. Sense resistor RS is connected between this
point and ground.
GROUND
Return for the logic supply (VCC) and load supply (VBB); the reference for all voltage
measurements.
D0
OUTB
LOAD SUPPLY
(DATA0) One-of-three (LSB) control bits for the internal digital-to-analog converter.
One-of-two output load connections.
(VBB) Supply voltage for the load.
Allegro MicroSystems, Inc.
5
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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