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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

A4970 데이터 시트보기 (PDF) - Allegro MicroSystems

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A4970
Allegro
Allegro MicroSystems Allegro
A4970 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
A4970
Dual Full-Bridge Motor Driver
LOGIC CONTROL OF OUTPUT CURRENT
Two logic level inputs (I0 and I1) allow digital selection of the motor
winding current at 100%, 67%, 33%, or 0% of the maximum level per the
table. The 0% output current condition turns off all drivers in the bridge and
can be used as an OUTPUT ENABLE function.
CURRENT-CONTROL TRUTH TABLE
l0
I1
Output Current
L
L
VREF/10 RS = ITRIP
H
L
VREF/15 RS = 2/3 ITRIP
L
H
VREF/30 RS = 1/3 ITRIP
H
H
0
These logic level inputs greatly enhance the implementation of microprocessor
controlled drive formats.
During half-step operations, the I0 and I1 allow the microprocessor to
control the motor at a constant torque between all positions in an eight-step se-
TYPICAL APPLICATION
1
FROM
μP
2
3 θ2
VREF
4
56 k7
RT
5
820 pF
CT
6
7
+5 V
56 k7
RT
820 pF
CT VREF
FROM
μP
8 VCC
99
10
11 θ1
12
24
23
CC
22
RC
RS
21
20
19
18
17
RS
16
RC
15
CC
14
13
V
BB
+
STEPPER
MOTOR
quence. This is accomplished by digitally selecting
100% drive current when only one phase is on and
67% drive current when two phases are on. Logic
highs on both I0 and I1 turn-off all drivers to allow
rapid current decay when switching phases. This
helps to ensure proper motor operation at high step
rates.
The logic control inputs can also be used to
select a reduced current level (and reduced power
dissipation) for "hold" conditions and/or increased
current (and available torque) for start-up condi-
tions.
GENERAL
The PHASE input to each bridge determines
the direction motor winding current ows. An in-
ternally generated dead time (approximately 2 μs)
prevents crossover currents that can occur when
switching the PHASE input.
All four drivers in the bridge output can be
turned-off between steps (I0 = I1 2.4 V), result-
ing in a fast current decay through the internal
output clamp and yback diodes. The fast current
decay is desirable in half-step and high-speed ap-
plications. The PHASE, I0,and I1 inputs oat high.
Varying the reference voltage, VREF , pro-
vides continuous control of the peak load current
for micro-stepping applications.
Thermal protection circuitry turns-off all
drivers when the junction temperature reaches
+170°C. It is only intended to protect the device
from failures due to excessive junction tempera-
ture and should not imply that output short circuits
are permitted. The output drivers are re-enabled
when the junction temperature cools to +145°C.
The A4970 output drivers are optimized for
500 mA operating current. Under normal operat-
ing conditions, when combined with the excellent
thermal properties of the package designs, this
allows continuous operation of both bridges simul-
taneously at 500 mA.
TRUTH TABLE
PHASE
H
L
OUTA
H
L
OUTB
L
H
Allegro MicroSystems, Inc.
6
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com

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