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A4402

Constant On-Time Buck Converter With Integrated Linear Regulator

Allegro MicroSystems 

A4402

Constant On-Time Buck Converter

With Integrated Linear Regulator

FB Both output regulators use a resistive feedback network to set

the output voltage. To prevent introducing noise into the FB net-

work it is important to keep the total impedance of the FB nodes

low enough to prevent noise injection. For commercial applica-

tions it is recommended that the impedances on the FB nodes are

less than 50 kΩ. For automotive applications it is recommended

that the total impedance of the FB nodes is less than 25 kΩ.

TSET The TSET pin serves a dual function by controlling the

timing for both the soft start ramp and the WDI input. The current

sourced from the TSET pin is dependant on the state of NPOR.

There are two formulas for calculating the time constants. CTSET

must be selected so that both the WDI frequency and soft start

requirements are met. The formulas for calculating WDI and soft

start timing are:

tWDI = 7.2 × 9.6 × 104 × CTSET , and

(3)

tSS = 6.0 × 6.0 ×104 × CTSET ,

(4)

where CTSET is the value of the capacitor and the results,

tx, are in s.

Watchdog The WDI input is used to monitor the state of a DSP

or microcontroller. A constant current is driven into the capacitor

on TSET, causing the voltage on the TSET pin to ramp upward

until, at each rising edge on the WDI input, the ramp is pulled

down to VRESET. If no edge is seen on the WDI pin before the

ramp reaches VTRIP , the NPOR pin is pulled low.

The watchdog timer is not activated until the WDI input sees one

rising edge. If the watchdog timer is not going to be used, the

WDI pin should be pulled to ground with a 4.7 kΩ resistor.

Soft Start During soft start, an internal ramp generator and the

external capacitor on TSET are used to ramp the output voltage

in a controlled fashion. This reduces the demand on the exter-

nal power supply by limiting the current that charges the output

capacitor and any DC load at startup. Either of the following

conditions are required to trigger a soft start:

• ENB pin input rising edge

• Reset of a TSD event

When a soft start event occurs, VO2 is held in the off state until

the soft start ramp timer expires. Then the regulator will power

up normally. Refer to timing diagrams for details.

BOOT A bootstrap capacitor is used to provide adequate charge

to the NMOS switch. The boot capacitor is referenced to LX

and supplies the gate drive with a voltage larger than the supply

voltage. The size of the capacitor must be 0.01 μF, X7R type, and

rated for at least 25 V.

TON A resistor from the TON input to VIN1 sets the on-time of

the converter for a given input voltage. The formula to calculate

the on-time, tON (ns), is:

tON =

RTON

VIN1

3.12 10–12 + 60 × 1.0–9

(5)

When the supply voltage is between 9 and 17.5 V, the switcher

period remains constant, at a level based on the selected value

of Rton . At voltages lower than 9 V and higher than 17.5 V, the

period is reduced by a factor of 3.5.

If a constant period is desired over varying input voltages, it is

important to select an on-time that under worst case conditions

will not exceed the minimum off-time or minimum on-time of the

converter. For reasonable input voltage ranges, the period of the

converter can be held constant, resulting in a constant operating

frequency over the input supply range.

More information on how to choose Rton can be found in the

Application Information section.

ISEN The sense input is used to sense the current in the diode

during the off-time cycle. The value for RSENSE is obtained by the

formula:

RSENSE = VISEN / IVALLEY ,

(6)

where IVALLEY is the lowest current measured through the induc-

tor during the off-time cycle.

It is recommended that the current sense resistor be sized so that,

at peak output current, the voltage on ISEN does not exceed

–0.5 V. Because the diode current is measured when the inductor

current is at the valley, the average output current is greater than

the IVALLEY value. The value for IVALLEY should be:

IVALLEY = IOUT(av) – 0.5 IRIPPLE + K ,

(7)

Allegro MicroSystems, Inc.

9

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

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