datasheetbank_Logo
전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

80C453 데이터 시트보기 (PDF) - Philips Electronics

부품명
상세내역
일치하는 목록
80C453
Philips
Philips Electronics Philips
80C453 Datasheet PDF : 23 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Philips Semiconductors
CMOS single-chip 8-bit microcontrollers
Preliminary specification
80C453/83C453/87C453
DESCRIPTION
The Philips 8XC453 is an I/O expanded single-chip microcontroller
fabricated with Philips high-density CMOS technology. Philips
epitaxial substrate minimizes latch-up sensitivity.
The 8XC453 is a functional extension of the 87C51 microcontroller
with three additional I/O ports and four I/O control lines. The 8XC453
is available in 68-pin LCC packages. Four control lines associated
with port 6 facilitate high-speed asynchronous I/O functions.
The 87C453 includes an 8k × 8 EPROM, a 256 × 8 RAM, 56 I/O
lines, two 16-bit timer/counters, a seven source, two priority level,
nested interrupt structure, a serial I/O port for either a full duplex
UART, I/O expansion, or multi-processor communications, and
on-chip oscillator and clock circuits.
The 87C453 has two software selectable modes of reduced activity
for further power reduction; idle mode and power-down mode. Idle
mode freezes the CPU while allowing the RAM, timers, serial port,
and interrupt system to continue functioning. Power-down mode
freezes the oscillator, causing all other chip functions to be
inoperative while maintaining the RAM contents.
FEATURES
80C51 based architecture
Seven 8-bit I/O ports
Port 6 features:
Eight data pins
Four control pins
Direct MPU bus interface
ISA Bus Interface
Parallel printer interface
IBF and OBF interrupts
A flag latch on host write
On the microcontroller:
8k × 8 EPROM
Quick pulse programming algorithm
Two-level program security system
256 × 8 RAM
Two 16-bit counter/timers
Two external interrupts
External memory addressing capability
64k ROM and 64k RAM
Low power consumption:
Normal operation: less than 24mA at 5V, 16MHz
Idle mode
Power-down mode
Reduced EMI
Full-duplex enhanced UART
Framing error detection
Automatic address recognition
LCC PIN FUNCTIONS
9
1
10
61
60
LCC
26
44
Pin Function
1 EA/VPP
2 P2.0/A8
3 P2.1/A9
4 P2.2/A10
5 P2.3/A11
6 P2.4/A12
7 P2.5/A13
8 P2.6/A14
9 P2.7/A15
10 P0.7/AD7
11 P0.6/AD6
12 P0.5/AD5
13 P0.4/AD4
14 P0.3/AD3
15 P0.2/AD2
16 P0.1/AD1
17 P0.0/AD0
18 VCC
19 P4.7
20 P4.6
21 P4.5
22 P4.4
23 P4.3
27
43
Pin Function
24 P4.2
25 P4.1
26 P4.0
27 P1.0
28 P1.1
29 P1.2
30 P1.3
31 P1.4
32 P1.5
33 P1.6
34 P1.7
35 RST
36 P3.0/RxD
37 P3.1/TxD
38 P3.2/INTO
39 P3.3/INT1
40 P3.4/T0
41 P3.5/T1
42 P3.6/WR
43 P3.7/RD
44 P5.0
45 P5.1
46 P5.2
Pin Function
47 P5.3
48 P5.4
49 P5.5
50 P5.6
51 P5.7
52 XTAL2
53 XTAL1
54 VSS
55 ODS
56 IDS
57 BFLAG
58 AFLAG
59 P6.0
60 P6.1
61 P6.2
62 P6.3
63 P6.4
64 P6.5
65 P6.6
66 P6.7
67 PSEN
68 ALE/PROG
SU00157
1996 Aug 15
3-311

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]