82C84 데이터 시트보기 (PDF) - Intersil

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82C84

CMOS Clock Generator Driver

Intersil 

Functional Diagram

82C84A

11

RES

17

X1

X2 16

13

F/C

EF1 14

1

CSYNC

4

RDY1

AEN1 3

RDY2 6

7

AEN2

15

ASYNC

XTAL

OSCILLATOR

÷3

SYNC

CK

D

Q

FF1

D

10

Q

RESET

CK

12

OSC

÷2

SYNC

2

PCLK

8

CLK

CK

5

D

Q READY

FF2

CONTROL PIN

LOGICAL 1

LOGICAL 0

F/C

External Clock

Crystal Drive

RES

Normal

Reset

RDY1, RDY2

Bus Ready

Bus Not Ready

AEN1, AEN2

Address Disabled Address Enable

ASYNC

1 Stage Ready

Synchronization

2 Stage Ready

Synchronization

4-288

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