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74VHCT574A

OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING

STMicroelectronics 

®

74VHCT574A

OCTAL D-TYPE FLIP FLOP

WITH 3 STATE OUTPUT NON INVERTING

s HIGH SPEED:

fMAX = 180 MHz (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 4 µA (MAX.) at TA = 25 oC

s COMPATIBLE WITH TTL OUTPUTS:

VIH = 2V (MIN), VIL = 0.8V (MAX)

s POWER DOWN PROTECTION ON INPUTS &

OUTPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8 mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC (OPR) = 4.5V to 5.5V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 574

s IMPROVED LATCH-UP IMMUNITY

s LOW NOISE VOLP = 0.9V (Max.)

DESCRIPTION

The 74VHCT574A is an advanced high-speed

CMOS OCTAL D-TYPE FLIP FLOP with 3

STATE OUTPUT NON INVERTING fabricated

with sub-micron silicon gate and double-layer

metal wiring C2MOS technology.

This 8 bit D-Type flip-flop is controlled by a clock

input (CK) and an output enable input (OE).

On the positive transition of the clock, the Q

M

(Micro Package)

T

(TSSOP Package)

ORDER CODES :

74VHCT574AM

74VHCT574AT

outputs will be set to logic states that were setup

at the D inputs.

While the OE input is low, the 8 outputs will be in

a normal logic state (high or low logic level) and,

while high level, the outputs will be in a high

impedance state.

The output control does not affect the internal

operation of flip flop; that is, the old data can be

retained or the new data can be entered even

while the outputs are off.

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage. This

device can be used to interface 5V to 3V.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

August 1999

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