74LVC1G86 데이터 시트보기 (PDF) - NXP Semiconductors.

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74LVC1G86

2-input EXCLUSIVE-OR gate

NXP Semiconductors. 

NXP Semiconductors

74LVC1G86

2-input EXCLUSIVE-OR gate

11. Dynamic characteristics

Table 8. Dynamic characteristics

Voltages are referenced to GND (ground = 0 V); for load circuit see Figure 8.

Symbol Parameter

Conditions

−40 °C to +85 °C

Min

Typ[1]

Max

tpd

propagation delay A, B to Y; see Figure 7

[2]

VCC = 1.65 V to 1.95 V

1.0

3.7

9.9

VCC = 2.3 V to 2.7 V

0.5

2.5

5.5

VCC = 2.7 V

0.5

2.8

5.8

VCC = 3.0 V to 3.6 V

0.5

2.3

5.0

VCC = 4.5 V to 5.5 V

CPD

power dissipation VI = GND to VCC

capacitance

VCC = 3.3 V

0.5

1.9

4.0

[3]

-

25

-

[1] All typical values are measured at nominal VCC.

[2] tpd is the same as tPLH and tPHL

[3] CPD is used to determine the dynamic power dissipation (PD in µW).

PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

Σ(CL × VCC2 × fo) = sum of the outputs.

−40 °C to +125 °C Unit

Min

Max

1.0

13.0 ns

0.5

7.0 ns

0.5

7.5 ns

0.5

6.5 ns

0.5

5.5 ns

-

- pF

12. Waveforms

A, B input

Y output

VM

tPHL

VM

Measurement points are given in Table 9.

VOL and VOH are typical output voltage levels that occur with the output.

Fig 7. The input A and B to output Y propagation delay times

tPLH

mna041

74LVC1G86_6

Product data sheet

Rev. 06 — 18 July 2007

© NXP B.V. 2007. All rights reserved.

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