74LV4060 데이터 시트보기 (PDF) - Philips Electronics
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74LV4060 Datasheet PDF : 18 Pages
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Philips Semiconductors
14-stage binary ripple counter with oscillator
Product specification
74LV4060
DYNAMIC POWER DISSIPATION
GND = 0 V; Tamb = 25 _C
PARAMETER
VCC
(V)
TYPICAL FORMULA FOR PD (mW)1
Total dynamic power dissipation when
using the on–chip oscillator (PD)
1.2 CPD x fosc x VCC2 + S (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 16 x VCC
2.0 CPD x fosc x VCC2 + S (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 460 x VCC
3.0 CPD x fosc x VCC2 + S (CL x VCC2 x fo) + 2Ct x VCC2 x fosc + 1000 x VCC
NOTE:
1. Where: fo = output frequency in MHz; fosc = oscillator frequency in MHz;
S (CL x VCC2 x fo) = sum of the outputs; CL = output load capacitance in pF;
Ct = timing capacitance in pF; VCC = supply voltage in V.
FUNCTIONAL DIAGRAM
10
9
RTC
CTC
11
RS
CP
14-stage binary counter
CD
12
MR
Q3
Q4
7
5
Q5
Q6
4
6
Q7
Q8
Q9
Q11
Q12
Q13
14
13
15
1
2
3
SV00312
LOGIC DIAGRAM
CTC
RTC
RS
FF1
FF4
CP
Q
CD
FF10
FF12
FF14
MR
Q3
Q9
Q11
Q13
SV00313
1998 Jun 23
4
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