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74LV368

Hex buffer/line driver; inverting (3-State)

Philips Electronics 

Philips Semiconductors

Hex buffer/line driver; inverting (3-State)

Product specification

74LV368

FEATURES

• Optimized for Low Voltage applications: 1.0 to 3.6V

• Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V

• Typical VOLP (output ground bounce) t 0.8V @ VCC = 3.3V,

Tamb = 25°C

• Typical VOHV (output VOH undershoot) u 2V @ VCC = 3.3V,

Tamb = 25°C

• Inverting outputs

• Output capability: bus driver

• ICC category: SSI

DESCRIPTION

The 74LV368 a low–voltage Si–gate CMOS device and is pin and

function compatible with 74HC/HCT368.

The 74LV368 is a hex inverting buffer/line driver with 3–state

outputs. The 3–state outputs (nY) are controlled by the output

enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to

assume a high impedance OFF–state.

QUICK REFERENCE DATA

GND = 0V; Tamb = 25°C; tr =tf v2.5 ns

SYMBOL

PARAMETER

CONDITIONS

tPHL/tPLH

Propagation delay

nA to nY

CL = 15pF

VCC = 3.3V

CI

Input capacitance

CPD

Power dissipation capacitance per buffer Notes 1, 2

NOTES:

1 CPD is used to determine the dynamic power dissipation (PD in µW)

PD = CPD VCC2 x fi )S (CL VCC2 fo) where:

fi = input frequency in MHz; CL = output load capacitance in pF;

fo = output frequency in MHz; VCC = supply voltage in V;

S (CL VCC2 fo) = sum of the outputs.

2 The condition is VI = GND to VCC

TYPICAL

9.0

3.5

30

ORDERING INFORMATION

PACKAGES

16-Pin Plastic DIL

16-Pin Plastic SO

16-Pin Plastic SSOP Type II

16-Pin Plastic TSSOP Type I

TEMPERATURE RANGE OUTSIDE NORTH AMERICA

–40°C to +125°C

74LV368 N

–40°C to +125°C

74LV368 D

–40°C to +125°C

74LV368 DB

–40°C to +125°C

74LV368 PW

NORTH AMERICA

74LV368 N

74LV368 D

74LV368 DB

74LV368PW DH

UNIT

ns

pF

pF

PKG. DWG. #

SOT38-4

SOT109-1

SOT338-1

SOT403-1

1998 May 29

2

853–1966 19466

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