74LS251 데이터 시트보기 (PDF) - ON Semiconductor
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74LS251 Datasheet PDF : 8 Pages
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SN74LS251
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC I4
I5
I6
I7 S0 S1 S2
16 15 14 13 12 11 10 9
1 2 3 4 56 78
I3
I2
I1
I0
Z
Z
E0 GND
PIN NAMES
S0 – S2
E0
I0 – I7
Z
Z
Select Inputs
Output Enable (Active LOW) Inputs
Multiplexer Inputs
Multiplexer Output
Complementary Multiplexer Output
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
LOADING (Note a)
HIGH
LOW
0.5 U.L.
0.5 U.L.
0.5 U.L.
65 U.L.
65 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
15 U.L.
15 U.L.
9
S2
10
S1
11
S0
7
E1
LOGIC DIAGRAM
I0
I1
I2
I3
I4
I5
I6
I7
4
3
2
1
15
14
13
12
VCC = PIN 16
GND = PIN 8
= PIN NUMBERS
5
6
Z
Z
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