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74HC3G14

Triple inverting Schmitt trigger

NXP Semiconductors. 

NXP Semiconductors

74HC3G14; 74HCT3G14

Triple inverting Schmitt trigger

14. Application information

The slow input rise and fall times cause additional power dissipation, which can be

calculated using the following formula:

Padd = fi × (tr × ∆ICC(AV) + tf × ∆ICC(AV)) × VCC where:

Padd = additional power dissipation (µW);

fi = input frequency (MHz);

tr = input rise time (ns); 10 % to 90 %;

tf = input fall time (ns); 90 % to 10 %;

∆ICC(AV) = average additional supply current (µA).

∆ICC(AV) differs with positive or negative input transitions, as shown in Figure 12 and

Figure 13.

An example of a relaxation circuit using the 74HC3G14/74HCT3G14 is shown

in Figure 14.

200

∆ICC(AV)

(µA)

150

100

mna036

positive-going

edge

50

0

0

2.0

linear change of VI between 0.1VCC to 0.9VCC.

Fig 12. ∆ICC(AV) as a function of VCC for 74HC3G14

negative-going

edge

4.0

6.0

VCC (V)

74HC_HCT3G14_3

Product data sheet

Rev. 03 — 8 May 2009

© NXP B.V. 2009. All rights reserved.

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