74HC595D(2017) 데이터 시트보기 (PDF) - NXP Semiconductors.
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74HC595D
(Rev.:2017)
(Rev.:2017)
NXP Semiconductors.
74HC595D Datasheet PDF : 22 Pages
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Nexperia
74HC595; 74HCT595
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state
Symbol Parameter Conditions
25 °C
Min Typ [1] Max
tW
pulse width SHCP HIGH or LOW;
see Figure 8
16
6
-
STCP HIGH or LOW;
see Figure 9
16
5
-
MR LOW; see Figure 11
20
8
-
tsu
set-up time DS to SHCP; see Figure 9
SHCP to STCP;
see Figure 9
16
5
-
16
8
-
th
hold time DS to SHCP; see Figure 10
trec
recovery MR to SHCP; see Figure 11
time
3
-2
-
10
-7
-
fmax
maximum SHCP and STCP;
frequency see Figure 8 and Figure 9
30
52
-
CPD
power
fi = 1 MHz;
[5] [6]
-
130
-
dissipation VI = GND to VCC - 1.5 V
capacitance
-40 °C to
+85 °C
Min Max
20
-
20
-
25
-
20
-
20
-
3
-
13
-
24
-
-
-
-40 °C to Unit
+125 °C
Min Max
24
- ns
24
- ns
30
- ns
24
- ns
24
- ns
3
- ns
15
- ns
20
- MHz
-
- pF
[1] Typical values are measured at nominal supply voltage.
[2] tpd is the same as tPHL and tPLH.
[3] ten is the same as tPZL and tPZH.
[4] tdis is the same as tPLZ and tPHZ.
[5] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC2 × fi + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
Σ(CL × VCC2 × fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in V.
[6] All 9 outputs switching.
11.1 Waveforms and test circuit
1/ fmax
VI
SHCP input
VM
GND
VOH
tW
t PLH
t PHL
Q7S output
VM
VOL
mna557
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 8. Shift clock pulse, maximum frequency and input to output propagation delays
74HC_HCT595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 28 February 2017
© Nexperia B.V. 2017. All rights reserved.
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