74HC595BQ 데이터 시트보기 (PDF) - Philips Electronics
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74HC595BQ
Philips Electronics
74HC595BQ Datasheet PDF : 28 Pages
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Philips Semiconductors
8-bit serial-in, serial or parallel-out shift
register with output latches; 3-state
Product specification
74HC595; 74HCT595
SYMBOL
PARAMETER
TEST CONDITIONS
WAVEFORMS VCC (V)
MIN.
tW
shift clock pulse width
see Fig.7
4.5
20
HIGH or LOW
storage clock pulse width see Fig.8
HIGH or LOW
4.5
20
master reset pulse width see Fig.10
LOW
4.5
25
tsu
set-up time DS to SH_CP see Fig.9
4.5
20
set-up time
see Fig.8
4.5
20
SH_CP to ST_CP
th
hold time DS to SH_CP see Fig.9
4.5
3
trem
removal time
MR to SH_CP
see Fig.10
4.5
13
fmax
maximum clock
pulse frequency
see Figs 7 and 8 4.5
24
SH_CP or ST_CP
Tamb = −40 to +125 °C
tPHL/tPLH
propagation delay
SH_CP to Q7’
see Fig.7
4.5
−
propagation delay
ST_CP to Qn
see Fig.8
4.5
−
tPHL
propagation delay
see Fig.10
4.5
−
MR to Q7’
tPZH/tPZL
3-state output enable time see Fig.11
OE to Qn
4.5
−
tPHZ/tPLZ
3-state output disable time see Fig.11
OE to Qn
4.5
−
tW
shift clock pulse width
see Fig.7
4.5
24
HIGH or LOW
storage clock pulse width see Fig.8
HIGH or LOW
4.5
24
master reset pulse width see Fig.10
LOW
4.5
30
tsu
set-up time DS to SH_CP see Fig.9
4.5
24
set-up time
see Fig.8
4.5
24
SH_CP to ST_CP
th
hold time DS to SH_CP see Fig.9
4.5
3
trem
removal time
MR to SH_CP
see Fig.10
4.5
15
fmax
maximum clock
see Figs 7 and 8 4.5
20
pulse frequency
SH_CP or ST_CP
TYP.
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
MAX.
−
−
−
−
−
−
−
−
63
60
60
53
45
−
−
−
−
−
−
−
−
UNIT
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
2003 Jun 25
18
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