74HC245 데이터 시트보기 (PDF) - ON Semiconductor
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74HC245 Datasheet PDF : 8 Pages
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74HC245
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
VCC –55 to
V
25_C v 85_C v 125_C Unit
VIH Minimum High−Level Input Voltage Vout = VCC – 0.1 V
|Iout| v 20 mA
2.0
1.5
1.5
1.5
V
3.0
2.1
2.1
2.1
4.5
3.15
3.15
3.15
6.0
4.2
4.2
4.2
VIL Maximum Low−Level Input Voltage Vout = 0.1 V
|Iout| v 20 mA
2.0
0.5
0.5
0.5
V
3.0
0.9
0.9
0.9
4.5
1.35
1.35
1.35
6.0
1.8
1.8
1.8
VOH Minimum High−Level Output
Voltage
Vin = VIH
|Iout| v 20 mA
2.0
1.9
1.9
1.9
V
4.5
4.4
4.4
4.4
6.0
5.9
5.9
5.9
VOL Maximum Low−Level Output
Voltage
Vin = VIH |Iout| v 2.4 mA
|Iout| v 6.0 mA
|Iout| v 7.8 mA
Vin = VIL
|Iout| v 20 mA
3.0
2.48
2.34
2.2
4.5
3.98
3.84
3.7
6.0
5.48
5.34
5.2
2.0
0.1
0.1
0.1
V
4.5
0.1
0.1
0.1
6.0
0.1
0.1
0.1
Vin = VIL |Iout| v 2.4 mA
|Iout| v 6.0 mA
|Iout| v 7.8 mA
3.0
0.26
0.33
0.4
4.5
0.26
0.33
0.4
6.0
0.26
0.33
0.4
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0
±0.1
±1.0
±1.0
mA
IOZ Maximum Three−State Leakage Output in High−Impedance State
Current
Vin = VIL or VIH
Vout = VCC or GND
6.0
±0.5
±5.0
±10
mA
ICC Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0 mA
6.0
4.0
40
40
mA
6. Information on typical parametric values and high frequency or heavy load considerations can be found in the ON Semiconductor
High−Speed CMOS Data Book (DL129/D).
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Guaranteed Limit
Symbol
Parameter
VCC –55 to
V
25_C v 85_C v 125_C Unit
tPLH,
tPHL
Maximum Propagation Delay,
A to B, B to A
(Figures 1 and 3)
2.0
75
3.0
55
4.5
15
6.0
13
95
110
ns
70
80
19
22
16
19
tPLZ,
tPHZ
Maximum Propagation Delay,
Direction or Output Enable to A or B
(Figures 2 and 4)
2.0
110
140
165
ns
3.0
90
110
130
4.5
22
28
33
6.0
19
24
28
tPZL,
tPZH
Maximum Propagation Delay,
Output Enable to A or B
(Figures 2 and 4)
2.0
110
140
165
ns
3.0
90
110
130
4.5
22
28
33
6.0
19
24
28
tTLH,
tTHL
Maximum Output Transition Time,
Any Output
(Figures 1 and 3)
2.0
60
75
90
ns
3.0
23
27
32
4.5
12
15
18
6.0
10
13
15
Cin Maximum Input Capacitance (Pin 1 or Pin 19)
Cout Maximum Three−State I/O Capacitance
(I/O in High−Impedance State)
−
10
10
10
pF
−
15
15
15
pF
7. For propagation delays with loads other than 50 pF, and information on typical parametric values, see the ON Semiconductor High−Speed
CMOS Data Book (DL129/D).
Typical @ 25°C, VCC = 5.0 V
CPD Power Dissipation Capacitance (Per Transceiver Channel) (Note 8)
40
pF
8. Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see the ON
Semiconductor High−Speed CMOS Data Book (DL129/D).
http://onsemi.com
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