74F569 데이터 시트보기 (PDF) - Philips Electronics
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74F569 Datasheet PDF : 14 Pages
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Philips Semiconductors
4-bit bidirectional binary synchronous counter (3-State)
Product specification
74F569
FEATURES
• 4-bit bidirectional counting – binary counter
• Synchronous counting and loading
• Look ahead carry capability for easy cascading
• Preset capability for programmable operation
• Master Reset (MR) overrides all other inputs
• Synchronous Reset (SR) overrides counting and parallel loading
• Clock Carry (CC) output to be used as a clock for flip-flops,
register and counters
• 3-State outputs for bus organized systems
DESCRIPTION
The 74F569 is a fully synchronous Up/Down binary counter. It
features preset capabilities for programmable operation, carry look
ahead for programmable operation, carry look ahead for easy
cascading, and U/D input to control the direction of counting. For
maximum flexibility there are both Synchronous and Master Reset
inputs as well as both Clocked Carry (CC) and Terminal Count (TC)
outputs. All state changes except Master Reset are initiated by
rising edge of the clock. A High signal on the Output Enable (OE)
input forces the output buffers into the high impedance state but
does not prevent counting, resetting or parallel loading.
LOGIC SYMBOL
3456
11
PE
D0 D1 D2 D3
1
U/D
2
CP
7
CEP
12
CET
8
MR
CC
18
TC
19
9
SR
17
OE
Q0 Q1 Q2 Q3
VCC = Pin 20
GND = Pin 10
16 15 14 13
SF01056
PIN CONFIGURATION
U/D 1
CP 2
D0 3
D1 4
D2 5
D3 6
CEP 7
MR 8
SR 9
GND 10
20 VCC
19 TC
18 CC
17 OE
16 Q0
15 Q1
14 Q2
13 Q3
12 CET
11 PE
SF01072
TYPE
74F569
TYPICAL fMAX
115MHz
TYPICAL
SUPPLY CURRENT
(TOTAL)
40mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
20-pin plastic DIP
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
N74F569N
20-pin plastic SO
N74F569D
PKG.
DWG. #
SOT146-1
SOT163-1
LOGIC SYMBOL (IEEE/IEC)
CTR DIV 10
17
EN10
1
M1[UP]
M2[DOWN]
2
C5/1,4,7,8+/2,4,7,8–
Z6
12
G7
6,7,8,9
18
7
G8
1,7(CT=15)G9
19
9
5CT=0
2,7(CT=0)G9
11
M3[LOAD]
M4[COUNT]
8
CT=0
3
3,5D
4
5
6
10
16
15
14
13
SF01057
1996 Jan 05
2
853–0376 16193
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