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74AHC377D

Octal D-type flip-flop with data enable; positive-edge trigger

NXP Semiconductors. 

NXP Semiconductors

5. Pinning information

5.1 Pinning

74AHC377; 74AHCT377

Octal D-type flip-flop with data enable; positive-edge trigger

E1

Q0 2

D0 3

D1 4

Q1 5

Q2 6

D2 7

D3 8

Q3 9

GND 10

Fig 5. Pin configuration SO20 and TSSOP20

20 VCC

19 Q7

18 D7

17 D6

16 Q6

377

15 Q5

14 D5

13 D4

12 Q4

11 CP

mna917

5.2 Pin description

Table 2.

Symbol

E

Q0

D0

D1

Q1

Q2

D2

D3

Q3

GND

CP

Q4

D4

D5

Q5

Q6

D6

D7

Q7

VCC

Pin description

Pin

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

Description

data enable input (active LOW)

flip-flop output

data input

data input

flip-flop output

flip-flop output

data input

data input

flip-flop output

ground (0 V)

clock input (LOW-to-HIGH, edge triggered)

flip-flop output

data input

data input

flip-flop output

flip-flop output

data input

data input

flip-flop output

supply voltage

74AHC_AHCT377_2

Product data sheet

Rev. 02 — 12 June 2008

© NXP B.V. 2008. All rights reserved.

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