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74AHC594

8-bit shift register with output register

Philips Electronics 

Philips Semiconductors

74AHC594; 74AHCT594

8-bit shift register with output register

Table 9. Dynamic characteristics type 74AHCT594 …continued

GND = 0 V; tr = tf ≤ 3.0 ns; VCC = 4.5 V to 5.5 V; see Figure 15

Symbol Parameter

Test conditions

trec

recovery time

SHR to SHCP

CL = 50 pF; see Figure 13

recovery time

STR to STCP

CL = 50 pF; see Figure 14

fmax

maximum frequency CL = 50 pF; see Figure 9 and

SHCP or STCP

Figure 10

[1] Typical values are measured at VCC = 5.0 V.

[2] CPD is used to determine the dynamic power dissipation (PD in µW):

PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

∑ (CL × VCC2 × fo) = sum of outputs.

12. Waveforms

Min

Typ

Max

Unit

3.8

-

-

ns

4.3

-

-

ns

70

-

-

MHz

SHCP input

Q7S output

1/fmax

VM

tW

tPLH

VM

tPHL

tTLH

tTHL

001aae341

Measurement points are given in Table 10.

VOL and VOH are typical voltage output drop that occur with the output load.

Fig 9. The shift clock (SHCP) to output (Q7S) propagation delays, the shift clock pulse width, and the maximum

shift clock frequency

74AHC_AHCT594_1

Product data sheet

Rev. 01 — 4 July 2006

© Koninklijke Philips Electronics N.V. 2006. All rights reserved.

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