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74AHC14

Hex inverting Schmitt trigger

Philips Electronics 

Philips Semiconductors

Hex inverting Schmitt trigger

Product specification

74AHC14; 74AHCT14

FEATURES

• ESD protection:

HBM EIA/JESD22-A114-A

exceeds 2000 V

MM EIA/JESD22-A115-A

exceeds 200 V

CDM EIA/JESD22-C101

exceeds 1000 V

• Balanced propagation delays

• Inputs accepts voltages higher than

VCC

• For AHC only:

operates with CMOS input levels

• For AHCT only:

operates with TTL input levels

• Specified from

−40 to +85 and +125 °C.

DESCRIPTION

The 74AHC/AHCT14 are high-speed

Si-gate CMOS devices and are pin

compatible with low power Schottky

TTL (LSTTL). They are specified in

compliance with JEDEC standard

No. 7A.

The 74AHC/AHCT14 provide six

inverting buffers with Schmitt-trigger

action. They are capable of

transforming slowly changing input

signals into sharply defined, jitter-free

output signals.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.

SYMBOL PARAMETER

CONDITIONS

TYPICAL

UNIT

AHC AHCT

tPHL/tPLH propagation delay CL = 15 pF;

nA to nY

VCC = 5 V

3.2 4.0 ns

CI

input capacitance VI = VCC or GND 3.0 3.0 pF

CO

output capacitance

4.0 4.0 pF

CPD

power dissipation CL = 50 pF;

10

12

pF

capacitance

f = 1 MHz;

notes 1 and 2

Notes

1. CPD is used to determine the dynamic power dissipation (PD in µW).

PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

∑ (CL × VCC2 × fo) = sum of outputs;

CL = output load capacitance in pF;

VCC = supply voltage in Volts.

2. The condition is VI = GND to VCC.

PINNING

PIN

1, 3, 5, 9, 11 and 13

2, 4, 6, 8, 10 and 12

7

14

SYMBOL

1A to 6A

1Y to 6Y

GND

VCC

DESCRIPTION

data inputs

data outputs

ground (0 V)

DC supply voltage

FUNCTION TABLE

See note 1.

INPUTS

nA

L

H

OUTPUTS

nY

H

L

Note

1. H = HIGH voltage level;

L = LOW voltage level.

1999 Sep 27

2

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