48SD6404 데이터 시트보기 (PDF) - MAXWELL TECHNOLOGIES
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48SD6404 Datasheet PDF : 42 Pages
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256Mb (16-Meg X 4-Bit X 4-Banks) SDRAM
48SD6404
Command Operation
Command Truth Table
The SDRAM recognizes the following commands specified by the CS, RAS, CAS, WE and address pins:
COMMAND
SYMBOL
N-1
N
CS
RAS CAS
WE
BA0/
BA1
A10
A0 TO
A12
Ignore command
DESL
H
x
H
x
x
x
x
x
x
No Operation
NOP
H
x
L
H
H
H
x
x
x
Column Address and READ
H
x
L
H
L
H
V
L
V
Read command
Read with auto-pre- READ A H
x
L
H
L
H
V
H
V
charge
Column Address and WRIT
H
x
L
H
L
L
V
L
V
write command
Write with auto-pre- WRIT A H
x
L
H
L
L
V
H
V
charge
Row address strobe ACTV
H
x
L
L
H
H
V
V
V
and bank active
Precharge select
bank
PRE
H
x
L
L
H
L
V
L
x
Precharge all banks PALL
H
x
L
L
H
L
x
H
x
Refresh
REF/
H
L
L
L
L
H
x
x
x
SELF
Mode register set
MRS
H
x
L
L
L
L
V
V
V
Note: H: VIH L: VIL x VIH or VIL V: Valid address input
Ignore command (DESL): When this command is set (CS = High), the SDRAM ignores command input at
the clock. However, the internal status is held.
No Operation (NOP): This command is not an execution command. However, the internal operations
continue.
Column address strobe and read command (READ): This command starts a read operation. In addition,
the start address of a burst read is determined by the column address (AY0 to AY9, A11) and the bank select
address (BS). After the read operation, the output buffer becomes High-Z.
Read with auto-precharge (READ A): This command automatically performs a precharge operation after a
burst read with a burst length of 1, 2, 4, or 8.
01.11.05 Rev 2
All data sheets are subject to change without notice 8
©2005 Maxwell Technologies
All rights reserved.
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