4501 데이터 시트보기 (PDF) - Renesas Electronics

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4501

SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

Renesas Electronics 

4501 Group

PORT BLOCK DIAGRAMS

Register Y

Skip decision

Decoder (SZD instruction)

SD instruction

RD instruction

CLD

instruction

S

RQ

D0, D1

(Note 1)

Register Y

SD instruction

RD instruction

Decoder

Key-on wakeup

CLD

instruction

SCP instruction

K22

“L” level

detection circuit

Skip decision

(SZD instruction)

Skip decision

S

(SNZCP

instruction)

RQ

S

RCP instruction R Q

Pull-up

transistor

PU22

(Note 1)

D2/C (Note 2)

Register Y

SD instruction

RD instruction

Decoder

Key-on wakeup

Pull-up

transistor

K23

“L” level

detection circuit

PU23

CLD

instruction

Skip decision

(SZD instruction)

IAK instruction

S

Register A

RQ

A0 D

(Note 1)

D3/K (Note 2)

OKA instruction

TQ

Notes 1:

This symbol represents a parasitic diode on the port.

2: Applied potential to ports D2/C and D3/K must be VDD or less.

Port block diagram (1)

Rev.3.01 2005.02.07 page 8 of 112

REJ03B0104-0301

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