2SK3405 데이터 시트보기 (PDF) - NEC => Renesas Technology

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2SK3405

SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE

NEC => Renesas Technology 

ELECTRICAL CHARACTERISTICS(TA = 25°C)

CHARACTERISTICS

SYMBOL

TEST CONDITIONS

Drain Leakage Current

Gate Leakage Current

IDSS

VDS = 20 V, VGS = 0 V

IGSS

VGS = ±20 V, VDS = 0 V

Gate Cut-off Voltage

VGS(off)

VDS = 10 V, ID = 1 mA

Forward Transfer Admittance

| yfs |

VDS = 10 V, ID = 24 A

Drain to Source On-state Resistance

RDS(on)1

VGS = 10 V, ID = 24 A

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

RDS(on)2

Ciss

Coss

Crss

VGS = 4.5 V, ID = 24 A

VDS = 10 V

VGS = 0 V

f = 1 MHz

Turn-on Delay Time

Rise Time

Turn-off Delay Time

td(on)

tr

td(off)

VDD = 10 V , ID = 24 A

VGS(on) = 10 V

RG = 10 Ω

Fall Time

tf

Total Gate Charge

Gate to Source Charge

Gate to Drain Charge

QG

VDD = 16 V

QGS

VGS = 10 V

QGD

ID = 48 A

Diode Forward Voltage

VF(S-D)

IF = 48 A, VGS = 0 V

Reverse Recovery Time

Reverse Recovery Charge

trr

IF = 48 A, VGS = 0 V

Qrr

di/dt = 100 A/µs

2SK3405

MIN.

1.5

12.5

TYP.

6.5

9.9

1800

770

400

21

13

64

25

34

6.6

11

1.0

38

29

MAX.

10

±10

2.5

9.0

14.0

UNIT

µA

µA

V

S

mΩ

mΩ

pF

pF

pF

ns

ns

ns

ns

nC

nC

nC

V

ns

nC

TEST CIRCUIT 1 SWITCHING TIME

D.U.T.

RG

PG.

VGS

0

τ

τ = 1µs

Duty Cycle ≤ 1 %

RL

VDD

VGS

VGS

Wave Form

10 %

0

VDS

VDS

Wave Form

0

td(on)

90 %

90 %

10 %

tr td(off) tf

ton

toff

TEST CIRCUIT 2 GATE CHARGE

D.U.T.

IG = 2 mA

RL

PG.

50 Ω

VDD

2

Data Sheet D14639EJ2V0DS

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