SL6679 데이터 시트보기 (PDF) - Mitel Networks

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SL6679

Direct Conversion FSK Data Receiver

Mitel Networks 

OPERATION OF SL6679

Low Noise Amplifier

To achieve optimum performance it is necessary to incor-

porate a Low Noise RF Amplifier at the front end of the

receiver. This is easily biased using the on-chip voltages and

current source provided. All voltages and current sources

used for bias of the RF amplifier, receiver and mixers should

be RF decoupled using 1nF capacitors. The receiver also

requires a stable Local Oscillator at the required channel

frequency.

Local Oscillator

The Local Oscillator signal is applied to the device in

phase quadrature. This can be achieved with the use of two

RC networks operating at their 23dB/45° transfer character-

istic. The RC characteristics for I and Q channels are com-

bined to give a full 90° phase differential between the LO ports

of the device. Each LO port also requires an equal level of

drive from the oscillator. This is achieved by forming the two

RC networks into a power divider.

Gyrator Filters

The on-chip filters include an adjustable gyrator filter. This

may be adjusted by changing the value of the resistor con-

nected between pin 13 and GND. This allows adjustment of

the filters’ cutoff frequency and allows for compensation for

possible process variations.

Audio AGC (Fig. 3)

The Audio AGC consists of a current sink which is control-

led by the audio (baseband) signal. It has three parameters

that may be controlled by the user. These are the attack (turn

on ) time, decay (duration) time and threshold level. The

attack time is simply determined by the value of the external

capacitor connected to TCADJ. The external capacitor is in

series with an internal 100kΩ resistor and the time constant

of this circuit dictates the attack time of the AGC.

i.e. tATTACK = 100kΩ3C18

The decay time is determined by the external resistor

connected in parallel with the capacitor CTC. The decay time

is simply

tDECAY = R173C18

When a large audio (baseband) signal is incident on the

input to the AGC circuit, the variable current source is turned

on. This causes a voltage drop across R13. The voltage

potential between VREF and the voltage on pin 31 causes a

current to flow in pin 30. This charges up C18 through the

100kΩ internal resistor. As the voltage across the capacitor

increases, a current source is turned on and this sinks current

from pin 32. The current sink on pin 32 can be used to drive

SL6679

the external AGC circuit by causing a PIN diode to conduct,

reducing the signal to the RF amplifier.

RF AGC

The RF AGC is an automatic gain control loop that

protects the mixer’s RF inputs, Pins 3 and 5, from large out of

band RF signals. The loop consists of an RF received signal

strength indicator which detect the signal at the inputs of the

mixers. This RSSI signal is then used to control the LNA

current source (pin 1).

Regulator

The on-chip regulator should be used in conjunction with

a suitable PNP transistor to achieve regulation. As the transis-

tor forms part of the regulator feedback loop the transistor

should exhibit the following characteristics:

HFE.100 for VCE. = 0·1V

If no external transistor is used, the maximum current

sourcing capability of the regulator is limited to 30µA.

Automatic Frequency Control (Fig. 4)

The Automatic Frequency Control consists of a detection

circuit which gives a current output at AFC OP whose magni-

tude and sign is a function of the difference between the local

oscillator (fLO) and carrier frequencies (fC). This output current

is then filtered by an off-chip integrating capacitor. The

integrator’s output voltage is used to control a voltage control

crystal oscillator. This closes the AFC feedback loop giving

the automatic frequency control function. For an FSK modu-

lated incoming RF carrier, the AFC OP current’s polarity is

positive, i.e.current is sourced for fLO,fC,fLO14kHz and

negative, i.e. current is sunk, for fLO.fC.fLO24kHz. The

magnitude of the AFC OP current is a function of frequency

offset and the transmitted data’s bit stream. If the carrier

frequency, (fC), equals the local oscillator frequency, (fLO)

then the magnitude of the current is zero.

BIT RATE FILTER CONTROL

The logic level on pin 26 controls the cutoff frequency of

the 1st order bit rate for a given bit rate filter capacitor at pin

27. This allows the cutoff frequency to be changed between

fC, 2fC and 0·43fC through the logic level on pin 26. This

function is achieved by changing the value of the current in the

4f detector’s output stage. A logic zero (0V to 0·1V) on pin 26

gives a cutoff frequency of fC a logic one (VCC220·3V to VCC2)

gives a cut off frequency of 2fC and an open circuit at pin 26

gives a cutoff frequency of 0·43fC.

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