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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AK4356VQ 데이터 시트보기 (PDF) - Asahi Kasei Microdevices

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AK4356VQ
AKM
Asahi Kasei Microdevices AKM
AK4356VQ Datasheet PDF : 29 Pages
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ASAHI KASEI
[AK4356]
n Reset Function
When RSTN=0, all DACs are powered down but the internal register values are not initialized. The analog outputs go to
VCOM voltage and DZF pins of all channels go to “H”. Figure 7 shows the sequence of reset by RSTN bit.
RSTN bit
Internal
RSTN bit
2~3/fs (6)
Internal
State
D/A In
(Digital)
D/A Out
(Analog)
Clock In
MCLK,LRCK,BICK
DZFL/DZFR
Normal Operation
(1)
GD
Digital Block Power-down
Normal Operation
“0” data
(3) (2)
(3)
(4)
Don’t care
2/fs(5)
GD (1)
Notes:
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs go to VCOM voltage.
(3) Click noise occurs at the edges(“­ ¯”) of the internal timing of RSTN bit. This noise is output even if “0” data is
input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the reset mode (RSTN = “L”).
(5) DZF pins go to “H” when the RSTN bit becomes “0”, and go to “L” at 4~5/fs after RSTN bit becomes “1”.
(6) There is a delay, 2~3/fs from RSTN bit “1” to the internal RSTN “1”.
Figure 7. Reset sequence example
M0072-E-01
- 19 -
1999/09

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