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AD8250

10 MHz, 20 V/μs, G = 1, 2, 5, 10 iCMOS Programmable Gain Instrumentation Amplifier

Analog Devices 

AD8250

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Timing Diagram ........................................................................... 5

Absolute Maximum Ratings............................................................ 6

Maximum Power Dissipation ..................................................... 6

ESD Caution.................................................................................. 6

Pin Configuration and Function Descriptions............................. 7

Typical Performance Characteristics ............................................. 8

Theory of Operation ...................................................................... 15

Gain Selection ............................................................................. 15

Power Supply Regulation and Bypassing ................................ 17

REVISION HISTORY

5/13—Rev. B to Rev. C

Changed 49.9 Ω to 100 Ω in Driving an ADC Section and

Figure 55 .......................................................................................... 19

11/10—Rev. A to Rev. B

Changes to Voltage Offset, Offset RTI VOS, Average

Temperature Coefficient Parameter in Table 2............................. 3

Updated Outline Dimensions ....................................................... 22

5/08—Rev. 0 to Rev. A

Changes to Table 1............................................................................ 1

Changes to Table 2............................................................................ 3

Data Sheet

Input Bias Current Return Path ............................................... 17

Input Protection ......................................................................... 17

Reference Terminal .................................................................... 18

Common-Mode Input Voltage Range ..................................... 18

Layout .......................................................................................... 18

RF Interference ........................................................................... 19

Driving an ADC ......................................................................... 19

Applications..................................................................................... 20

Differential Output .................................................................... 20

Setting Gains with a Microcontroller ...................................... 20

Data Acquisition......................................................................... 21

Outline Dimensions ....................................................................... 22

Ordering Guide .......................................................................... 22

Changes to Table 3.............................................................................6

Added Figure 17; Renumbered Sequentially .................................9

Changes to Figure 23...................................................................... 10

Changes to Figure 24 to Figure 26................................................ 11

Added Figure 29 ............................................................................. 11

Changes to Figure 31...................................................................... 12

Deleted Figure 43 to Figure 46; Renumbered Sequentially ...... 14

Inserted Figure 45 and Figure 46.................................................. 14

Changes to Timing for Latched Gain Mode Section ................. 16

Changes to Layout Section and Coupling Noise Section.......... 18

Changes to Figure 59...................................................................... 21

1/07—Revision 0: Initial Version

Rev. C | Page 2 of 24

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