AD5421 데이터 시트보기 (PDF) - Analog Devices
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AD5421 Datasheet PDF : 36 Pages
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Data Sheet
AD5421
AC PERFORMANCE CHARACTERISTICS
Loop voltage = 24 V; REFIN = 2.5 V external; RL = 250 Ω; all specifications TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter1
DYNAMIC PERFORMANCE
Loop Current Settling Time
Loop Current Slew Rate
AC Loop Voltage Sensitivity
Min
Typ
Max
Unit
Test Conditions/Comments
50
µs
To 0.1% FSR, CIN = open circuit
400
µA/µs
CIN = open circuit
1.3
µA/V
1200 Hz to 2200 Hz, 5 V p-p, RL = 3 kΩ
1 Temperature range: −40°C to +105°C; typical at +25°C.
TIMING CHARACTERISTICS
Loop voltage = 24 V; REFIN = 2.5 V external; RL = 250 Ω; all specifications TMIN to TMAX.
Table 4.
Parameter1, 2, 3
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
Limit at TMIN, TMAX
33
17
17
17
10
25
5
5
25
10
70
0
70
Unit
ns min
ns min
ns min
ns min
ns min
µs min
ns min
ns min
µs min
ns min
ns max
ns min
ns max
Description
SCLK cycle time
SCLK high time
SCLK low time
SYNC falling edge to SCLK falling edge setup time
SCLK falling edge to SYNC rising edge
Minimum SYNC high time
Data setup time
Data hold time
SYNC rising edge to LDAC falling edge
LDAC pulse width low
SCLK rising edge to SDO valid (CL SDO = 30 pF)
SYNC falling edge to SCLK rising edge setup time
SYNC rising edge to SDO tristate (CL SDO = 30 pF)
1 Guaranteed by design and characterization; not production tested.
2 All input signals are specified with tR = tF = 5 ns (10% to 90% of DVDD) and timed from a voltage level of 1.2 V.
3 See Figure 2 and Figure 3.
Table 5. SPI Watchdog Timeout Periods
Parameter1
T0
T1
T2
Min
0
0
0
43
0
0
1
87
0
1
0
436
0
1
1
873
1
0
0
1746
1
0
1
2619
1
1
0
3493
1
1
1
4366
Typ
50
100
500
1000
2000
3000
4000
5000
Max
59
117
582
1163
2326
3489
4652
5814
1 Specifications guaranteed by design and characterization; not production tested.
Unit
ms
ms
ms
ms
ms
ms
ms
ms
Rev. H | Page 9 of 36
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