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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AD7453 데이터 시트보기 (PDF) - Analog Devices

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AD7453 Datasheet PDF : 20 Pages
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AD7453
TIMING SPECIFICATIONS
Guaranteed by characterization. All input signals are specified with tr = tf = 5 ns (10% to 90% of VDD) and timed from a voltage
level of 1.6 V.
See Figure 2 and the Serial Interface section.
VDD = 2.7 V to 5.25 V, fSCLK = 10 MHz, fS = 555 kSPS, VREF = 2.5 V, TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
fSCLK1
tCONVERT
tQUIET
t1
t2
t32
t42
t5
t6
t7
t83
tPOWER-UP 4
Limit at TMIN, TMAX
10
10
16 × tSCLK
1.6
60
10
10
20
40
0.4 tSCLK
0.4 tSCLK
10
10
35
1
Unit
kHz min
MHz max
µs max
ns min
ns min
ns min
ns max
ns max
ns min
ns min
ns min
ns min
ns max
µs max
Description
tSCLK = 1/fSCLK
Minimum quiet time between the end of a serial read and the next falling edge of CS
Minimum CS pulse width
CS falling edge to SCLK falling edge setup time
Delay from CS falling edge until SDATA three-state disabled
Data access time after SCLK falling edge
SCLK high pulse width
SCLK low pulse width
SCLK edge to data valid hold time
SCLK falling edge to SDATA three-state enabled
SCLK falling edge to SDATA three-state enabled
Power-up time from full power-down
CS
t2
SCLK
t3
SDATA
t1
1
2
3
t4
0
0
0
0
4 LEADING ZEROS
t5
4
tCONVERT
5
t7
DB11 DB10
B
13
14
t6
15
t8
DB2
DB1
DB0
16
tQUIET
THREE-STATE
Figure 2. AD7453 Serial Interface Timing Diagram
1 Mark/space ratio for the SCLK input is 40/60 to 60/40.
2 Measured with the load circuit of Figure 3 and defined as the time required for the output to cross 0.8 V or 2.4 V with VDD = 5 V, and the time required for an output to
cross 0.4 V or 2.0 V for VDD = 3 V.
3 t8 is derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 3. The measured number is then extrapolated
back to remove the effects of charging or discharging the 25 pF capacitor. This means that the time, t8, quoted in the timing characteristics is the true bus relinquish
time of the part and is independent of the bus loading.
4 See Power-Up Time section.
Rev. B | Page 5 of 20

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