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TDF8553J Datasheet PDF : 47 Pages
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NXP Semiconductors
TDF8553J
4 × 50 Watt power amplifier and multiple voltage regulator
8. Functional description
The TDF8553 is a multiple voltage regulator combined with four independent audio power
amplifiers configured in bridge tied load, with diagnostic capability. All regulator output
voltages except regulators 2 and 6 can be controlled via the I2C-bus.
The amplifier diagnostic functions give information about output offset, load, or
short-circuit. Diagnostic functions are controlled via the I2C-bus. The TDF8553 is
protected against short-circuit, over-temperature, open ground and open VP connections.
If a short-circuit occurs at the output of a single amplifier, that channel shuts down, and
the other channels continue to operate normally. The channel that has a short-circuit can
be switched off by the microcontroller via the appropriate enable bit of the I2C-bus to
prevent any noise generated by the fault condition from being heard.
8.1 Start-up
At power on, regulators 2 and 6 will reach their final voltage when the backup capacitor
voltage exceeds 5.5 V independently of the voltage on pin STB. When pin STB is LOW,
the total quiescent current is low, and the I2C-bus lines are high impedance.
When pin STB is HIGH, the I2C-bus is biased on and then the TDF8553 performs a
power-on reset. When bit D0 of instruction byte IB1 is set, the amplifier is activated, bit D7
of data byte DB2 (power-on reset occurred) is reset, and pin DIAG is no longer held LOW.
8.2 Start-up and shut-down timing
See Figure 12.
A capacitor connected to pin SVR enables smooth start-up and shut-down, preventing the
amplifier from producing audible clicks at switch-on or switch-off. The start-up and
shut-down times can be extended by increasing the capacitor value.
If the amplifier is shut down using pin STB, the amplifier is muted, the regulators and
switches are switched off, and the capacitor connected to pin SVR discharges. The
low-current standby mode is activated 2 seconds after pin STB goes LOW.
8.3 Power-on reset and supply voltage spikes
See Figure 13 and Figure 14.
If the supply voltage drops too low to guarantee the integrity of the data in the I2C-bus
latches, the power-on reset cycle will start. All latches will be set to a predefined state,
pin DIAG will be pulled LOW to indicate that a power-on reset has occurred, and bit D7 of
data byte DB2 is also set for the same reason. When D0 of instruction byte IB1 is set, the
power-on flag resets, pin DIAG is released and the amplifier will then enter its start-up
cycle.
8.4 Diagnostic output
Pin DIAG indicates clipping, thermal protection pre-warning of amplifier and voltage
regulator sections, short-circuit protection, and low and high battery voltage. Pin DIAG is
an open-drain output, is active LOW, and must be connected to an external voltage via an
TDF8553J_1
Objective data sheet
Rev. 01 — 3 December 2008
© NXP B.V. 2008. All rights reserved.
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