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K8P5616UZB
Samsung
Samsung Samsung
K8P5616UZB Datasheet PDF : 60 Pages
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K8P5616UZB
Rev. 1.0
datasheet NOR FLASH MEMORY
256M Bit (16M x16, 32Mb x8) Page Mode / Page NOR Flash Memory
1.0 FEATURES
2.0 GENERAL DESCRIPTION
Single Voltage, 2.7V to 3.6V for Read and Write operations
Voltage range of 2.7V to 3.1V valid for MCP product
Organization
16M x16 bit (Word mode)
32M x 8 bit (Byte mode)
Fast Read Access Time : 80ns
Page Mode Operation
8 Words Page access allows fast asychronous read
Page Read Access Time : 30ns
Read While Program/Erase Operation
Multiple Bank Architecture (4 Banks)
Bank 0: 32Mbit (64Kw x 32)
Bank 1: 96Mbit (64Kw x 96)
Bank 2: 96Mbit (64Kw x 96)
Bank 3: 32Mbit (64Kw x 32)
OTP Block : Extra 256 word
- 128word for factory and 128word for customer OTP
Power Consumption (typical value)
- Active Read Current : 30mA (@5MHz)
- Program/Erase Current : 25mA
- Read While Program or Read While Erase Current : 65mA
- Standby Mode/Auto Sleep Mode : 20uA
Support Single & 32word Buffer Program
WP/ACC input pin
- Allows special protection of first or last block of flash array at VIL,
regardless of block protect status
- Removes special protection at VIH, the first or last block of flash array
return to normal block protect status
- Reduce program time at VHH : 6us/word at Write Buffer
Erase Suspend/Resume
Program Suspend/Resume
Unlock Bypass Mode
Hardware RESET Pin
Command Register Operation
Supports Common Flash Memory Interface
Industrial Temperature : -40°C to 85°C
Extended Temperature : -25°C to 85°C
Endurance : 100Kcycle
Vio options at 1.8V and 3V I/O
Package options
- 56 Pin TSOP (20x14mm)
- 64 Ball FBGA (11x13, 1.0mm Ball Pitch)
The K8P5616UZB featuring single 3.0V power supply, is an 256Mbit NOR-
type Flash Memory organized as 32M x 8 or 16M x16. The memory archi-
tecture of the device is designed to divide its memory arrays into 256 blocks
with independent hardware protection. This block architecture provides
highly flexible erase and program capability. The K8P5616UZB NOR Flash
consists of four banks. This device is capable of reading data from one
bank while programming or erasing in the other banks.
The K8P5616UZB offers page access time of 30ns with random access
time of 80ns. The devices fast access times allow high speed microproces-
sors to operate without wait states. The device performs a program opera-
tion in unit of 16 bits (Word) and erases in units of a block. Single or multiple
blocks can be erased. The block erase operation is completed within typi-
cally 0.7 sec. The device requires 25mA as program/erase current in the
commercial and extended temperature ranges.
The K8P5616UZB NOR Flash Memory is created by using Samsung's
advanced CMOS process technology. This device is available in 64FBGA
and 56 Pin TSOP. The device is compatible with EPROM applications to
require high-density and cost-effective nonvolatile read/write storage solu-
tions.
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