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92HD71B5 데이터 시트보기 (PDF) - Integrated Device Technology

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92HD71B5
IDT
Integrated Device Technology IDT
92HD71B5 Datasheet PDF : 216 Pages
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92HD71B7
4-CHANNEL HD AUDIO CODEC OPTIMIZED FOR LOW POWER
PC AUDIO
Table 8. Valid Digital Mic Configurations
Digital Mics
1
2
3
4
Data Sample
Single Edge
Double Edge on
either DMIC_0 or 1
OR
Single Edge on
DMIC_0 and 1
Double Edge on
one DMIC pin and
Single Edge on the
second DMIC pin.
Double Edge
ADC Conn.
Notes
0, or 1
Available on either DMIC_0 or DMIC_1
Both ADC Channels produce data, may be in phase or out by 1/2 DMIC_CLK
period depending upon external configuration and timing
0, or 1
Available on either DMIC_0 or DMIC_1, External logic required to support
sampling on a single Digital Mic pin channel on rising edge and second Digital Mic
right channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. If both DMIC_0 and DMIC_1 are used to
support 2 digital microphones, 2 separate ADC units will be used, however, this
configuration is not recommended since it consumes two stereo ADC resources.
0, or 1
Requires both DMIC_0 AND DMIC_1, External logic required to support sampling
on a single Digital Mic pin channel on rising edge and second Digital Mic right
channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. Two ADC units are required to support
this configuration
0, or 1
Connected to DMIC_0 and DMIC_1, External logic required to support sampling
on a single Digital Mic pin channel on rising edge and second Digital Mic right
channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. Two ADC units are required to support
this configuration
Table 9. DMIC_CLK and DMIC_0,1 Operation During Power States
Power State
DMIC Widget
Enabled?
DMIC_CLK
Output
DMIC_0,1
D0
Yes
Clock Capable Input Capable
D1
Yes
D2
Yes
D3
Yes
D0-D3
No
Clock Disabled Input Disabled
Clock Disabled
Clock Disabled
Clock Disabled
Input Disabled
Input Disabled
Input Disabled
Notes
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1
Input Widget is Enabled. Otherwise, the DMIC_CLK remains Low
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1
Input Widget is Enabled. Otherwise, the DMIC_CLK remains Low
DMIC_CLK Remains Low
DMIC_CLK Remains Low
DMIC_CLK is HIGH-Z with Weak Pull-down
IDT™ CONFIDENTIAL AND PROPRIETARY
19
4-CHANNEL HD AUDIO CODEC OPTIMIZED FOR LOW POWER
92HD71B7
V 0.9 07/07

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