92HD71B7 데이터 시트보기 (PDF) - Integrated Device Technology

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92HD71B7

4-CHANNEL HD AUDIO CODEC OPTIMIZED FOR LOW POWER

Integrated Device Technology 

92HD71B7

4-CHANNEL HD AUDIO CODEC OPTIMIZED FOR LOW POWER

PC AUDIO

AFG Power

State

D0-D3

RESET#

Asserted (Low)

De-Asserted (High)

De-Asserted (High)

De-Asserted (High)

De-Asserted (High)

Table 7. EAPD Behavior

GPIO Enable

-

Enabled

Disabled

Disabled

Disabled

Output Enable

-

-

Enabled

Disabled

Disabled

EAPD Power

State

-

-

-

D2-D3

D0-D1

Pin Behavior

Hi-Z (internal pull-down enabled)

immediately after power on,

otherwise the previous state is

retained until the rising edge of

RESET#

Active - Pin reflects GPIO0

configuration (internal pull-up

enabled)

Active - Pin Drives SPDIFOut0/1

output (internal pull-down enabled)

Hi-Z (internal pull-down enabled)

Active - Pin drives the value of the

EAPD bit (internal pull-down

enabled)

1.4.13.

Digital Microphone Support

The digital microphone interface permits connection of a digital microphone(s) to the CODEC via the

DMIC0, DMIC1, and DMIC_CLK 3-pin interface. The DMIC0 and DMIC1 signals are inputs that carry

individual channels of digital Mic data to the ADC. In the event that a single microphone is used, the

data is ported to both ADC channels.

The DMIC_CLK output is controllable from 4.704Mhz, 3.528Mhz, 2.352Mhz, 1.176Mhz and is syn-

chronous to the 24Mhz internal clock. The default frequency is 2.352Mhz.

92HD71B7 supports the following digital microphone configurations:

Digital Mics

Data Sample

0

N/A

Table 8. Valid Digital Mic Configurations

ADC Conn.

N/A

No Digital Microphones

Notes

IDT™ CONFIDENTIAL AND PROPRIETARY

18

4-CHANNEL HD AUDIO CODEC OPTIMIZED FOR LOW POWER

92HD71B7

V 0.9 07/07

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