74HC373D 데이터 시트보기 (PDF) - NXP Semiconductors.
부품명
상세내역
일치하는 목록
74HC373D Datasheet PDF : 26 Pages
| |||
NXP Semiconductors
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
Table 9. Dynamic characteristics 74HCT373 …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12.
Symbol Parameter
Conditions
Min Typ Max Unit
Tamb = 40 C to +85 C
tpd
propagation delay
Dn to Qn; see Figure 8
[1]
VCC = 4.5 V
-
-
38
ns
LE to Qn; see Figure 9
ten
enable time
VCC = 4.5 V
OE to Qn; see Figure 10
-
-
40
ns
[2]
tdis
disable time
VCC = 4.5 V
OE to Qn; see Figure 10
-
-
40
ns
[3]
tt
transition time
VCC = 4.5 V
-
-
38
ns
Qn; see Figure 8 and Figure 9
[4]
VCC = 4.5 V
-
-
15
ns
tW
pulse width
LE HIGH; see Figure 9
VCC = 4.5 V
20
-
-
ns
tsu
set-up time
Dn to LE; see Figure 11
th
hold time
VCC = 4.5 V
Dn to LE; see Figure 11
15
-
-
ns
Tamb = 40 C to +125 C
tpd
propagation delay
VCC = 4.5 V
Dn to Qn; see Figure 8
4
-
-
ns
[1]
VCC = 4.5 V
-
-
45
ns
LE to Qn; see Figure 9
ten
enable time
VCC = 4.5 V
OE to Qn; see Figure 10
-
-
48
ns
[2]
tdis
disable time
VCC = 4.5 V
OE to Qn; see Figure 10
-
-
48
ns
[3]
tt
transition time
VCC = 4.5 V
-
-
45
ns
Qn; see Figure 8 and Figure 9
[4]
VCC = 4.5 V
-
-
18
ns
tW
pulse width
LE HIGH; see Figure 9
VCC = 4.5 V
24
-
-
ns
tsu
set-up time Dn to LE
Dn to LE; see Figure 11
VCC = 4.5 V
18
-
-
ns
74HC_HCT373
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 13 December 2011
© NXP B.V. 2011. All rights reserved.
14 of 26
Share Link: 