GLT5160L16 데이터 시트보기 (PDF) - G-Link Technology

부품명

상세내역

일치하는 목록

GLT5160L16

16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM

G-Link Technology  

Auto Refresh

Single cycle of auto-refresh is initiated with a REFA (CS = RAS =

CAS = L, WE = CKE = H) command. The refresh address is gener-

ated internally. 4096 REFA cycles within 64 ms refresh 16 Mbit

memory cells. The auto-refresh is performed on each bank alter-

nately (ping-pong refresh). Before performing an auto-refresh, both

banks must be in the idle state. Additional commands must not be

supplied to the device before tRC from the REFA command.

CLK

CS

RAS

CAS

WE

CKE

A[10:0]

BA

NOP or Deselect

Minimum tRC

Auto Refresh on Bank 0

Figure 17. Auto Refresh

Auto Refresh on Bank 1

Self Refresh

Self-refresh mode is entered by issuing a REFS command (CS =

RAS = CAS = L, WE = H, CKE = L). Once the self-refresh is initi-

ated, it is maintained as long as CKE is kept low. During the self-

refresh mode, CKE is asynchronous and the only enabled input (but

asynchronous), all other inputs including CLK are disabled and

ignored, and power consumption due to synchronous inputs is

saved. To exit the self-refresh, supplying stable CLK inputs, assert-

ing DESEL or NOP command and then asserting CKE (REFSX).

After tRC from REFSX both banks are in the idle state and a new

command can be issued after tRC, but DESEL or NOP commands

must be asserted till then.

CLK

CS

RAS

CAS

WE

CKE

A[10:0]

BA

Self Refresh Entry

Stable CLK

NOP

new command

X

minimum tRC for recovery

0

Self Refresh Exit

Figure 18. Self-Refresh

18

G-LINK Technology

DEC. 2003 (Rev. 2.4)

Share Link: