25AA1024T-I 데이터 시트보기 (PDF) - Microchip Technology

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25AA1024T-I

1 Mbit SPI Bus Serial EEPROM

Microchip Technology 

25AA1024/25LC1024

Read Sequence

The device is selected by pulling CS low. The 8-bit

READ instruction is transmitted to the 25XX1024

followed by the 24-bit address, with seven MSBs of the

address being “don’t care” bits. After the correct READ

instruction and address are sent, the data stored in the

memory at the selected address is shifted out on the

SO pin.

FIGURE 2-1:

CS

READ SEQUENCE

The data stored in the memory at the next address can

be read sequentially by continuing to provide clock

pulses. The internal Address Pointer is automatically

incremented to the next higher address after each byte

of data is shifted out. When the highest address is

reached (1FFFFh), the address counter rolls over to

address, 00000h, allowing the read cycle to be contin-

ued indefinitely. The read operation is terminated by

raising the CS pin (Figure 2-1).

SCK

SI

SO

0 1 2 3 4 5 6 7 8 9 10 11

29 30 31 32 33 34 35 36 37 38 39

Instruction

24-bit Address

0 0 0 0 0 0 1 1 23 22 21 20

210

High-Impedance

Data Out

76543210

© 2007 Microchip Technology Inc.

Preliminary

DS21836D-page 7

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